Re: [Simulavr-devel] test mechanism

[Thomas Klepp]

Hi Michael,

> I don't understand the need for #ifndef SWIG .

That's, because SWIG can't handle some operators in C++ classes and give 
warnings for that. To prevent this warnings you'll find such #ifndef 
SWIG ... #endif constructs. This happens also on some other places in 
the code resp. the header files. Some of it could be handled with 
changes on swig files (.i files), but some isn't possible to handle. (as 
I understand)


One question more for me: you wrote some code snippets for this CBI/SBI 
problem and you asked a few postings before for the git repo's. Do you 
want to use (and change to solve this problem) the code base from CVS 
repo or from the git repo?

My question points to that, that in git repo we use a derived class from 
RWMemoryMember, called IOReg. Your code would work too for registers, 
which don't have this "clear bit on SBI" feature, also on git repo, 
because the second step in IOReg, using setter/getter access to hardware 
units would work in the same way. But in this special case we need to a 
derived class for IOReg, which hasn't only byte getter/setter, but also 
a special bit setter functionality. (get would work in every case)

Greetings, Thomas