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[PATCH 04/13] accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup
From: |
Richard Henderson |
Subject: |
[PATCH 04/13] accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup |
Date: |
Thu, 23 Feb 2023 10:43:33 -1000 |
Using an atomic write or read-write insn on ROM is basically
a happens-never case. Handle it via stop-the-world, which
will generate non-atomic serial code, where we can correctly
ignore the write while producing the correct read result.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index e9848b3ab6..74ad8e0876 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1974,7 +1974,7 @@ static void *atomic_mmu_lookup(CPUArchState *env,
target_ulong addr,
}
/* Notice an IO access or a needs-MMU-lookup access */
- if (unlikely(tlb_addr & TLB_MMIO)) {
+ if (unlikely(tlb_addr & (TLB_MMIO | TLB_DISCARD_WRITE))) {
/* There's really nothing that can be done to
support this apart from stop-the-world. */
goto stop_the_world;
--
2.34.1
- [PATCH 00/13] {tcg,aarch64}: Add TLB_CHECK_ALIGNED, Richard Henderson, 2023/02/23
- [PATCH 01/13] target/sparc: Use tlb_set_page_full, Richard Henderson, 2023/02/23
- [PATCH 02/13] accel/tcg: Retain prot flags from tlb_fill, Richard Henderson, 2023/02/23
- [PATCH 03/13] accel/tcg: Store some tlb flags in CPUTLBEntryFull, Richard Henderson, 2023/02/23
- [PATCH 04/13] accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup,
Richard Henderson <=
- [PATCH 05/13] softmmu/physmem: Check watchpoints for read+write at once, Richard Henderson, 2023/02/23
- [PATCH 06/13] accel/tcg: Trigger watchpoints from atomic_mmu_lookup, Richard Henderson, 2023/02/23
- [PATCH 07/13] accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASK, Richard Henderson, 2023/02/23
- [PATCH 08/13] target/arm: Support 32-byte alignment in pow2_align, Richard Henderson, 2023/02/23
- [PATCH 09/13] exec/memattrs: Remove target_tlb_bit*, Richard Henderson, 2023/02/23
- [PATCH 10/13] accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull, Richard Henderson, 2023/02/23
- [PATCH 11/13] accel/tcg: Add TLB_CHECK_ALIGNED, Richard Henderson, 2023/02/23