[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 12/32] hw/riscv/boot.c: calculate fdt size after fdt_pack()
From: |
Alistair Francis |
Subject: |
[PULL 12/32] hw/riscv/boot.c: calculate fdt size after fdt_pack() |
Date: |
Tue, 7 Feb 2023 17:09:23 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
fdt_pack() can change the fdt size, meaning that fdt_totalsize() can
contain a now deprecated (bigger) value.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230201171212.1219375-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/boot.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index cb27798a25..2d03a9a921 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -253,8 +253,13 @@ uint64_t riscv_load_fdt(hwaddr dram_base, uint64_t
mem_size, void *fdt)
{
uint64_t temp, fdt_addr;
hwaddr dram_end = dram_base + mem_size;
- int ret, fdtsize = fdt_totalsize(fdt);
+ int ret = fdt_pack(fdt);
+ int fdtsize;
+ /* Should only fail if we've built a corrupted tree */
+ g_assert(ret == 0);
+
+ fdtsize = fdt_totalsize(fdt);
if (fdtsize <= 0) {
error_report("invalid device-tree");
exit(1);
@@ -269,9 +274,6 @@ uint64_t riscv_load_fdt(hwaddr dram_base, uint64_t
mem_size, void *fdt)
temp = (dram_base < 3072 * MiB) ? MIN(dram_end, 3072 * MiB) : dram_end;
fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
- ret = fdt_pack(fdt);
- /* Should only fail if we've built a corrupted tree */
- g_assert(ret == 0);
/* copy in the device tree */
qemu_fdt_dumpdtb(fdt, fdtsize);
--
2.39.1
- [PULL 02/32] include/hw/riscv/opentitan: update opentitan IRQs, (continued)
- [PULL 02/32] include/hw/riscv/opentitan: update opentitan IRQs, Alistair Francis, 2023/02/07
- [PULL 03/32] hw/riscv: boot: Don't use CSRs if they are disabled, Alistair Francis, 2023/02/07
- [PULL 01/32] target/riscv: update disas.c for xnor/orn/andn and slli.uw, Alistair Francis, 2023/02/07
- [PULL 05/32] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP, Alistair Francis, 2023/02/07
- [PULL 06/32] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX, Alistair Francis, 2023/02/07
- [PULL 08/32] hw/riscv/virt.c: calculate socket count once in create_fdt_imsic(), Alistair Francis, 2023/02/07
- [PULL 10/32] hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms', Alistair Francis, 2023/02/07
- [PULL 04/32] target/riscv: Update VS timer whenever htimedelta changes, Alistair Francis, 2023/02/07
- [PULL 11/32] target/riscv: set tval for triggered watchpoints, Alistair Francis, 2023/02/07
- [PULL 07/32] target/riscv: Ensure opcode is saved for all relevant instructions, Alistair Francis, 2023/02/07
- [PULL 12/32] hw/riscv/boot.c: calculate fdt size after fdt_pack(),
Alistair Francis <=
- [PULL 09/32] hw/riscv/virt.c: rename MachineState 'mc' pointers to 'ms', Alistair Francis, 2023/02/07
- [PULL 13/32] hw/riscv: split fdt address calculation from fdt load, Alistair Francis, 2023/02/07
- [PULL 14/32] hw/riscv: change riscv_compute_fdt_addr() semantics, Alistair Francis, 2023/02/07
- [PULL 16/32] RISC-V: Adding XTheadSync ISA extension, Alistair Francis, 2023/02/07
- [PULL 15/32] RISC-V: Adding XTheadCmo ISA extension, Alistair Francis, 2023/02/07
- [PULL 17/32] RISC-V: Adding XTheadBa ISA extension, Alistair Francis, 2023/02/07
- [PULL 18/32] RISC-V: Adding XTheadBb ISA extension, Alistair Francis, 2023/02/07
- [PULL 19/32] RISC-V: Adding XTheadBs ISA extension, Alistair Francis, 2023/02/07
- [PULL 20/32] RISC-V: Adding XTheadCondMov ISA extension, Alistair Francis, 2023/02/07
- [PULL 21/32] RISC-V: Adding T-Head multiply-accumulate instructions, Alistair Francis, 2023/02/07