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[PULL 05/45] target/arm: Fix return values in fp_sysreg_checks()
From: |
Peter Maydell |
Subject: |
[PULL 05/45] target/arm: Fix return values in fp_sysreg_checks() |
Date: |
Thu, 3 Jun 2021 16:58:24 +0100 |
The fp_sysreg_checks() function is supposed to be returning an
FPSysRegCheckResult, which is an enum with three possible values.
However, three places in the function "return false" (a hangover from
a previous iteration of the design where the function just returned a
bool). Make these return FPSysRegCheckFailed instead (for no
functional change, since both false and FPSysRegCheckFailed are
zero).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210520152840.24453-6-peter.maydell@linaro.org
---
target/arm/translate-vfp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/translate-vfp.c b/target/arm/translate-vfp.c
index ac5832a4ed5..791c4f5f70b 100644
--- a/target/arm/translate-vfp.c
+++ b/target/arm/translate-vfp.c
@@ -691,16 +691,16 @@ static FPSysRegCheckResult fp_sysreg_checks(DisasContext
*s, int regno)
break;
case ARM_VFP_FPSCR_NZCVQC:
if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) {
- return false;
+ return FPSysRegCheckFailed;
}
break;
case ARM_VFP_FPCXT_S:
case ARM_VFP_FPCXT_NS:
if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) {
- return false;
+ return FPSysRegCheckFailed;
}
if (!s->v8m_secure) {
- return false;
+ return FPSysRegCheckFailed;
}
break;
default:
--
2.20.1
- [PULL 00/45] target-arm queue, Peter Maydell, 2021/06/03
- [PULL 01/45] target/arm: Add isar feature check functions for MVE, Peter Maydell, 2021/06/03
- [PULL 02/45] target/arm: Update feature checks for insns which are "MVE or FP", Peter Maydell, 2021/06/03
- [PULL 03/45] target/arm: Move fpsp/fpdp isar check into callers of do_vfp_2op_sp/dp, Peter Maydell, 2021/06/03
- [PULL 04/45] target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dp, Peter Maydell, 2021/06/03
- [PULL 06/45] target/arm: Implement M-profile VPR register, Peter Maydell, 2021/06/03
- [PULL 07/45] target/arm: Make FPSCR.LTPSIZE writable for MVE, Peter Maydell, 2021/06/03
- [PULL 05/45] target/arm: Fix return values in fp_sysreg_checks(),
Peter Maydell <=
- [PULL 10/45] docs: Fix installation of man pages with Sphinx 4.x, Peter Maydell, 2021/06/03
- [PULL 08/45] target/arm: Allow board models to specify initial NS VTOR, Peter Maydell, 2021/06/03
- [PULL 09/45] arm: Consistently use "Cortex-Axx", not "Cortex Axx", Peter Maydell, 2021/06/03
- [PULL 11/45] target/arm: Mark LDS{MIN,MAX} as signed operations, Peter Maydell, 2021/06/03
- [PULL 12/45] target/arm: fix missing exception class, Peter Maydell, 2021/06/03
- [PULL 16/45] target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16, Peter Maydell, 2021/06/03
- [PULL 13/45] target/arm: fold do_raise_exception into raise_exception, Peter Maydell, 2021/06/03
- [PULL 14/45] target/arm: use raise_exception_ra for MTE check failure, Peter Maydell, 2021/06/03
- [PULL 20/45] softfpu: Add float_round_to_odd_inf, Peter Maydell, 2021/06/03
- [PULL 18/45] target/arm: Implement scalar float32 to bfloat16 conversion, Peter Maydell, 2021/06/03