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[PULL 32/42] target/ppc: Implement PNOP
From: |
David Gibson |
Subject: |
[PULL 32/42] target/ppc: Implement PNOP |
Date: |
Thu, 3 Jun 2021 18:22:21 +1000 |
From: Richard Henderson <richard.henderson@linaro.org>
The illegal suffix behavior matches what was observed in a
POWER10 DD2.0 machine.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210601193528.2533031-6-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/insn64.decode | 67 ++++++++++++++++++++++
target/ppc/translate/fixedpoint-impl.c.inc | 11 ++++
2 files changed, 78 insertions(+)
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 1965088915..9aa5097a98 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -28,3 +28,70 @@
PADDI 000001 10 0--.-- .................. \
001110 ..... ..... ................ @PLS_D
+
+### Prefixed No-operation Instruction
+
+@PNOP 000001 11 0000-- 000000000000000000 \
+ ................................
+
+{
+ [
+ ## Invalid suffixes: Branch instruction
+ # bc[l][a]
+ INVALID ................................ \
+ 010000-------------------------- @PNOP
+ # b[l][a]
+ INVALID ................................ \
+ 010010-------------------------- @PNOP
+ # bclr[l]
+ INVALID ................................ \
+ 010011---------------0000010000- @PNOP
+ # bcctr[l]
+ INVALID ................................ \
+ 010011---------------1000010000- @PNOP
+ # bctar[l]
+ INVALID ................................ \
+ 010011---------------1000110000- @PNOP
+
+ ## Invalid suffixes: rfebb
+ INVALID ................................ \
+ 010011---------------0010010010- @PNOP
+
+ ## Invalid suffixes: context synchronizing other than isync
+ # sc
+ INVALID ................................ \
+ 010001------------------------1- @PNOP
+ # scv
+ INVALID ................................ \
+ 010001------------------------01 @PNOP
+ # rfscv
+ INVALID ................................ \
+ 010011---------------0001010010- @PNOP
+ # rfid
+ INVALID ................................ \
+ 010011---------------0000010010- @PNOP
+ # hrfid
+ INVALID ................................ \
+ 010011---------------0100010010- @PNOP
+ # urfid
+ INVALID ................................ \
+ 010011---------------0100110010- @PNOP
+ # stop
+ INVALID ................................ \
+ 010011---------------0101110010- @PNOP
+ # mtmsr w/ L=0
+ INVALID ................................ \
+ 011111---------0-----0010010010- @PNOP
+ # mtmsrd w/ L=0
+ INVALID ................................ \
+ 011111---------0-----0010110010- @PNOP
+
+ ## Invalid suffixes: Service Processor Attention
+ INVALID ................................ \
+ 000000----------------100000000- @PNOP
+ ]
+
+ ## Valid suffixes
+ PNOP ................................ \
+ -------------------------------- @PNOP
+}
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
b/target/ppc/translate/fixedpoint-impl.c.inc
index 344a3ed54b..ce034a14a7 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -60,3 +60,14 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
a->si <<= 16;
return trans_ADDI(ctx, a);
}
+
+static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a)
+{
+ gen_invalid(ctx);
+ return true;
+}
+
+static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a)
+{
+ return true;
+}
--
2.31.1
- [PULL 17/42] target/ppc: removed mentions to DO_PPC_STATISTICS, (continued)
- [PULL 17/42] target/ppc: removed mentions to DO_PPC_STATISTICS, David Gibson, 2021/06/03
- [PULL 20/42] hw/core/cpu: removed cpu_dump_statistics function, David Gibson, 2021/06/03
- [PULL 24/42] target/ppc: overhauled and moved logic of storing fpscr, David Gibson, 2021/06/03
- [PULL 23/42] target/ppc: removed all mentions to PPC_DUMP_CPU, David Gibson, 2021/06/03
- [PULL 22/42] target/ppc: removed GEN_OPCODE decision tree, David Gibson, 2021/06/03
- [PULL 15/42] target/ppc: updated meson.build to support disable-tcg, David Gibson, 2021/06/03
- [PULL 16/42] target/ppc: remove ppc_cpu_dump_statistics, David Gibson, 2021/06/03
- [PULL 31/42] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, David Gibson, 2021/06/03
- [PULL 19/42] ppc/pef.c: initialize cgs->ready in kvmppc_svm_init(), David Gibson, 2021/06/03
- [PULL 25/42] target/ppc: powerpc_excp: Move lpes code to where it is used, David Gibson, 2021/06/03
- [PULL 32/42] target/ppc: Implement PNOP,
David Gibson <=
- [PULL 36/42] target/ppc: Implement prefixed integer store instructions, David Gibson, 2021/06/03
- [PULL 28/42] target/ppc: Introduce macros to check isa extensions, David Gibson, 2021/06/03
- [PULL 26/42] target/ppc: powerpc_excp: Remove dump_syscall_vectored, David Gibson, 2021/06/03
- [PULL 27/42] target/ppc: powerpc_excp: Consolidade TLB miss code, David Gibson, 2021/06/03
- [PULL 30/42] target/ppc: Add infrastructure for prefixed insns, David Gibson, 2021/06/03
- [PULL 29/42] target/ppc: Move page crossing check to ppc_tr_translate_insn, David Gibson, 2021/06/03
- [PULL 34/42] target/ppc: Implement prefixed integer load instructions, David Gibson, 2021/06/03
- [PULL 33/42] target/ppc: Move D/DS/X-form integer loads to decodetree, David Gibson, 2021/06/03
- [PULL 37/42] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions, David Gibson, 2021/06/03
- [PULL 35/42] target/ppc: Move D/DS/X-form integer stores to decodetree, David Gibson, 2021/06/03