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[PULL 07/36] target/mips: Simplify meson TCG rules
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 07/36] target/mips: Simplify meson TCG rules |
Date: |
Sun, 2 May 2021 18:15:09 +0200 |
We already have the mips_tcg_ss source set for TCG-specific files,
use it for mxu_translate.c and tx79_translate.c to simplify a bit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-2-f4bug@amsat.org>
---
target/mips/meson.build | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 3b131c4a7f6..3733d1200f7 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -26,10 +26,9 @@
'translate_addr_const.c',
'txx9_translate.c',
))
-mips_ss.add(when: ['CONFIG_TCG', 'TARGET_MIPS64'], if_true: files(
+mips_tcg_ss.add(when: 'TARGET_MIPS64', if_true: files(
'tx79_translate.c',
-))
-mips_tcg_ss.add(when: 'TARGET_MIPS64', if_false: files(
+), if_false: files(
'mxu_translate.c',
))
--
2.26.3
- [PULL 00/36] MIPS patches for 2021-05-02, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 02/36] target/mips: Fix CACHEE opcode (CACHE using EVA addressing), Philippe Mathieu-Daudé, 2021/05/02
- [PULL 03/36] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 04/36] target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 05/36] target/mips: Migrate missing CPU fields, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 06/36] target/mips: Make check_cp0_enabled() return a boolean, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 07/36] target/mips: Simplify meson TCG rules,
Philippe Mathieu-Daudé <=
- [PULL 08/36] target/mips: Move IEEE rounding mode array to new source file, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 09/36] target/mips: Move msa_reset() to new source file, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 10/36] target/mips: Make CPU/FPU regnames[] arrays global, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 11/36] target/mips: Optimize CPU/FPU regnames[] arrays, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 12/36] target/mips: Restrict mips_cpu_dump_state() to cpu.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 13/36] target/mips: Turn printfpr() macro into a proper function, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 14/36] target/mips: Declare mips_env_set_pc() inlined in "internal.h", Philippe Mathieu-Daudé, 2021/05/02
- [PULL 15/36] target/mips: Merge do_translate_address into cpu_mips_translate_address, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 16/36] target/mips: Extract load/store helpers to ldst_helper.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 17/36] meson: Introduce meson_user_arch source set for arch-specific user-mode, Philippe Mathieu-Daudé, 2021/05/02