[PULL 00/36] MIPS patches for 2021-05-02

[Philippe Mathieu-Daudé]

The following changes since commit 53c5433e84e8935abed8e91d4a2eb813168a0ecf:

  Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210501' into 
staging (2021-05-02 12:02:46 +0100)

are available in the Git repository at:

  https://github.com/philmd/qemu.git tags/mips-20210502

for you to fetch changes up to 1c13514449439b5ff1f746ed0bf73b298da39cf0:

  gitlab-ci: Add KVM mips64el cross-build jobs (2021-05-02 16:49:35 +0200)

----------------------------------------------------------------
MIPS patches queue

- Fix CACHEE opcode
- Add missing CP0 checks to nanoMIPS RDPGPR / WRPGPR opcodes
- Remove isa_get_irq() call in PIIX4 south bridge
- Add various missing fields to the MIPS CPU migration vmstate
- Lot of code moved around to allow TCG or KVM only builds
- Restrict non-virtualized machines to TCG
- Add KVM mips64el cross-build jobs to gitlab-ci


scripts/checkpatch.pl false positive in patch 31
"Move TLB management helpers to tcg/sysemu/tlb_helper.c":

4 checkpatch errors:

  ERROR: space prohibited after that '&' (ctx:WxW)
  #414: FILE: target/mips/tcg/sysemu/tlb_helper.c:71:
  +    tlb->XI0 = (env->CP0_EntryLo0 >> CP0EnLo_XI) & 1;
                                                    ^

  ERROR: space prohibited after that '&' (ctx:WxW)
  #415: FILE: target/mips/tcg/sysemu/tlb_helper.c:72:
  +    tlb->RI0 = (env->CP0_EntryLo0 >> CP0EnLo_RI) & 1;
                                                    ^

  ERROR: space prohibited after that '&' (ctx:WxW)
  #420: FILE: target/mips/tcg/sysemu/tlb_helper.c:77:
  +    tlb->XI1 = (env->CP0_EntryLo1 >> CP0EnLo_XI) & 1;
                                                    ^

  ERROR: space prohibited after that '&' (ctx:WxW)
  #421: FILE: target/mips/tcg/sysemu/tlb_helper.c:78:
  +    tlb->RI1 = (env->CP0_EntryLo1 >> CP0EnLo_RI) & 1;
                                                    ^

  total: 4 errors, 0 warnings, 688 lines checked
----------------------------------------------------------------

Philippe Mathieu-Daudé (36):
  hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ
  target/mips: Fix CACHEE opcode (CACHE using EVA addressing)
  target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes
  target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode
  target/mips: Migrate missing CPU fields
  target/mips: Make check_cp0_enabled() return a boolean
  target/mips: Simplify meson TCG rules
  target/mips: Move IEEE rounding mode array to new source file
  target/mips: Move msa_reset() to new source file
  target/mips: Make CPU/FPU regnames[] arrays global
  target/mips: Optimize CPU/FPU regnames[] arrays
  target/mips: Restrict mips_cpu_dump_state() to cpu.c
  target/mips: Turn printfpr() macro into a proper function
  target/mips: Declare mips_env_set_pc() inlined in "internal.h"
  target/mips: Merge do_translate_address into
    cpu_mips_translate_address
  target/mips: Extract load/store helpers to ldst_helper.c
  meson: Introduce meson_user_arch source set for arch-specific
    user-mode
  target/mips: Introduce tcg-internal.h for TCG specific declarations
  target/mips: Add simple user-mode mips_cpu_do_interrupt()
  target/mips: Add simple user-mode mips_cpu_tlb_fill()
  target/mips: Move cpu_signal_handler definition around
  target/mips: Move sysemu specific files under sysemu/ subfolder
  target/mips: Move physical addressing code to sysemu/physaddr.c
  target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG
  target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder
  target/mips: Restrict mmu_init() to TCG
  target/mips: Move tlb_helper.c to tcg/sysemu/
  target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope
  target/mips: Move Special opcodes to tcg/sysemu/special_helper.c
  target/mips: Move helper_cache() to tcg/sysemu/special_helper.c
  target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c
  target/mips: Move exception management code to exception.c
  target/mips: Move CP0 helpers to sysemu/cp0.c
  target/mips: Move TCG source files under tcg/ sub directory
  hw/mips: Restrict non-virtualized machines to TCG
  gitlab-ci: Add KVM mips64el cross-build jobs

 meson.build                                  |    6 +
 target/mips/helper.h                         |  183 +--
 target/mips/internal.h                       |  105 +-
 target/mips/tcg/tcg-internal.h               |   64 +
 target/mips/translate.h                      |    7 +-
 target/mips/{ => tcg}/msa_helper.h.inc       |    0
 target/mips/tcg/sysemu_helper.h.inc          |  185 +++
 target/mips/{ => tcg}/mips32r6.decode        |    0
 target/mips/{ => tcg}/mips64r6.decode        |    0
 target/mips/{ => tcg}/msa32.decode           |    0
 target/mips/{ => tcg}/msa64.decode           |    0
 target/mips/{ => tcg}/tx79.decode            |    0
 hw/isa/piix4.c                               |    5 +-
 target/mips/cpu.c                            |  311 ++---
 target/mips/fpu.c                            |   25 +
 target/mips/msa.c                            |   60 +
 target/mips/op_helper.c                      | 1210 ------------------
 target/mips/{ => sysemu}/addr.c              |    0
 target/mips/sysemu/cp0.c                     |  123 ++
 target/mips/{ => sysemu}/cp0_timer.c         |    0
 target/mips/{ => sysemu}/machine.c           |   21 +-
 target/mips/sysemu/physaddr.c                |  257 ++++
 target/mips/{ => tcg}/dsp_helper.c           |    0
 target/mips/tcg/exception.c                  |  167 +++
 target/mips/{ => tcg}/fpu_helper.c           |    8 -
 target/mips/tcg/ldst_helper.c                |  288 +++++
 target/mips/{ => tcg}/lmmi_helper.c          |    0
 target/mips/{ => tcg}/msa_helper.c           |   36 -
 target/mips/{ => tcg}/msa_translate.c        |    0
 target/mips/{ => tcg}/mxu_translate.c        |    0
 target/mips/tcg/op_helper.c                  |  420 ++++++
 target/mips/{ => tcg}/rel6_translate.c       |    0
 target/mips/{ => tcg/sysemu}/cp0_helper.c    |    0
 target/mips/{ => tcg/sysemu}/mips-semi.c     |    0
 target/mips/tcg/sysemu/special_helper.c      |  173 +++
 target/mips/{ => tcg/sysemu}/tlb_helper.c    |  623 +++++----
 target/mips/{ => tcg}/translate.c            |  115 +-
 target/mips/{ => tcg}/translate_addr_const.c |    0
 target/mips/{ => tcg}/tx79_translate.c       |    0
 target/mips/{ => tcg}/txx9_translate.c       |    0
 target/mips/tcg/user/tlb_helper.c            |   64 +
 .gitlab-ci.d/crossbuilds.yml                 |    8 +
 MAINTAINERS                                  |    3 +-
 hw/mips/meson.build                          |   11 +-
 target/mips/meson.build                      |   55 +-
 target/mips/sysemu/meson.build               |    7 +
 target/mips/tcg/meson.build                  |   35 +
 target/mips/tcg/sysemu/meson.build           |    6 +
 target/mips/tcg/user/meson.build             |    3 +
 49 files changed, 2426 insertions(+), 2158 deletions(-)
 create mode 100644 target/mips/tcg/tcg-internal.h
 rename target/mips/{ => tcg}/msa_helper.h.inc (100%)
 create mode 100644 target/mips/tcg/sysemu_helper.h.inc
 rename target/mips/{ => tcg}/mips32r6.decode (100%)
 rename target/mips/{ => tcg}/mips64r6.decode (100%)
 rename target/mips/{ => tcg}/msa32.decode (100%)
 rename target/mips/{ => tcg}/msa64.decode (100%)
 rename target/mips/{ => tcg}/tx79.decode (100%)
 create mode 100644 target/mips/fpu.c
 create mode 100644 target/mips/msa.c
 delete mode 100644 target/mips/op_helper.c
 rename target/mips/{ => sysemu}/addr.c (100%)
 create mode 100644 target/mips/sysemu/cp0.c
 rename target/mips/{ => sysemu}/cp0_timer.c (100%)
 rename target/mips/{ => sysemu}/machine.c (94%)
 create mode 100644 target/mips/sysemu/physaddr.c
 rename target/mips/{ => tcg}/dsp_helper.c (100%)
 create mode 100644 target/mips/tcg/exception.c
 rename target/mips/{ => tcg}/fpu_helper.c (99%)
 create mode 100644 target/mips/tcg/ldst_helper.c
 rename target/mips/{ => tcg}/lmmi_helper.c (100%)
 rename target/mips/{ => tcg}/msa_helper.c (99%)
 rename target/mips/{ => tcg}/msa_translate.c (100%)
 rename target/mips/{ => tcg}/mxu_translate.c (100%)
 create mode 100644 target/mips/tcg/op_helper.c
 rename target/mips/{ => tcg}/rel6_translate.c (100%)
 rename target/mips/{ => tcg/sysemu}/cp0_helper.c (100%)
 rename target/mips/{ => tcg/sysemu}/mips-semi.c (100%)
 create mode 100644 target/mips/tcg/sysemu/special_helper.c
 rename target/mips/{ => tcg/sysemu}/tlb_helper.c (76%)
 rename target/mips/{ => tcg}/translate.c (99%)
 rename target/mips/{ => tcg}/translate_addr_const.c (100%)
 rename target/mips/{ => tcg}/tx79_translate.c (100%)
 rename target/mips/{ => tcg}/txx9_translate.c (100%)
 create mode 100644 target/mips/tcg/user/tlb_helper.c
 create mode 100644 target/mips/sysemu/meson.build
 create mode 100644 target/mips/tcg/meson.build
 create mode 100644 target/mips/tcg/sysemu/meson.build
 create mode 100644 target/mips/tcg/user/meson.build

-- 
2.26.3