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Re: [Simulavr-devel] ATMega8 class definition


From: Petr Hluzín
Subject: Re: [Simulavr-devel] ATMega8 class definition
Date: Sun, 17 Oct 2010 21:35:10 +0200

Hi Thomas

On 17 October 2010 19:09, Thomas Klepp <address@hidden> wrote:
> Hi Ivica,
>
>> I think the atmega16_32 interrupt vectors for EEPROM Ready are not
>
> Not only this interrupt, also some other around ... My mistake, I've
> compared mostly register set but not interrupt vector table too.

By looking at the datasheets:
The set of available vectors is the same. Just the ordering is different.
(One could move "20 $026 TIMER0 COMP Timer/Counter0 Compare Match"
between 9 and 10 and move "19 $024 INT2 External Interrupt Request 2"
between 3 and 4 the tables would be identical.)

Unfortunately this means all vectors (besides INT0, INT1 and SPM_RDY)
have differing indexes.

How to fix that?

I already made separate constructors for the different 'eeprom' and
'stack' initialization in commit [1]. However doing the same for all
other peripherals' interrupts would duplicate much code. I guess I
should revert my commit, rename the 'stack11bit' to 'atmega16' and
make the vector indexes conditional on the argument, probably using C
ternary operator.

Another proposal?
Are there more similar devices in family with ATmega16/ATmega32?

[1] 
http://git.savannah.gnu.org/cgit/simulavr.git/commit/?id=573baf41b30edf37c395528770282f26387f18fb

-- 
Petr Hluzin



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