Re: [Qemu-ppc] [Qemu-devel] [RFC PATCH 00/17] target/ppc: Implement POWER9 pseries tcg legacy kernel support

[no-reply]

Hi,

Your series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [RFC PATCH 00/17] target/ppc: Implement POWER9 pseries 
tcg legacy kernel support
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
fc9a657 target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation
3a6e0b1 target/ppc/mmu_hash64: Fix printing unsigned as signed int
0df1183 tcg/POWER9: NOOP the cp_abort instruction
8b5bf42 target/ppc/debug: Print LPCR register value if register exists
341c7e5 target/ppc/POWER9: Add cpu_has_work function for POWER9
398b7d5 target/ppc/POWER9: Add POWER9 pa-features definition
96a44df target/ppc/POWER9: Update to new pte format for POWER9 accesses
9190833 target/ppc/POWER9: Add POWER9 mmu fault handler
bb7fa61 target/ppc/POWER9: Remove SDR1 register
1191b9a target/ppc/POWER9: Add external partition table pointer to cpu state
8d19919 target/ppc/POWER9: Add partition table pointer to sPAPRMachineState
ffd1d31 target/ppc/POWER9: Direct all instr and data storage interrupts to the 
hypv
4c92646 target/ppc/POWER9: Adapt LPCR handling for POWER9
e1a9f12 target/ppc/POWER9: Add ISAv3.00 MMU definition
87144e8 target/ppc: Add pcr_supported to POWER9 cpu class definition
b9a19a8 hw/ppc/spapr: Add POWER9 to pseries cpu models
eb1b279 powerpc/cpu-models: rename ISAv3.00 logical PVR definition

=== OUTPUT BEGIN ===
Checking PATCH 1/17: powerpc/cpu-models: rename ISAv3.00 logical PVR 
definition...
Checking PATCH 2/17: hw/ppc/spapr: Add POWER9 to pseries cpu models...
Checking PATCH 3/17: target/ppc: Add pcr_supported to POWER9 cpu class 
definition...
ERROR: spaces required around that '-' (ctx:VxV)
#21: FILE: target/ppc/cpu.h:2253:
+    PCR_COMPAT_3_00     = 1ull << (63-59),
                                      ^

total: 1 errors, 0 warnings, 15 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 4/17: target/ppc/POWER9: Add ISAv3.00 MMU definition...
Checking PATCH 5/17: target/ppc/POWER9: Adapt LPCR handling for POWER9...
Checking PATCH 6/17: target/ppc/POWER9: Direct all instr and data storage 
interrupts to the hypv...
Checking PATCH 7/17: target/ppc/POWER9: Add partition table pointer to 
sPAPRMachineState...
Checking PATCH 8/17: target/ppc/POWER9: Add external partition table pointer to 
cpu state...
Checking PATCH 9/17: target/ppc/POWER9: Remove SDR1 register...
ERROR: braces {} are necessary for all arms of this statement
#29: FILE: target/ppc/kvm.c:935:
+        if (env->external_patbe)
[...]

ERROR: braces {} are necessary for all arms of this statement
#54: FILE: target/ppc/mmu-hash64.c:300:
+        if (env->external_patbe)
[...]

ERROR: braces {} are necessary for all arms of this statement
#77: FILE: target/ppc/translate.c:6927:
+        if (env->spr_cb[SPR_SDR1].name)
[...]

ERROR: space prohibited between function name and open parenthesis '('
#102: FILE: target/ppc/translate_init.c:727:
+static void gen_spr_ne_power9 (CPUPPCState *env)

ERROR: space prohibited between function name and open parenthesis '('
#113: FILE: target/ppc/translate_init.c:746:
+static void gen_spr_ne_601 (CPUPPCState *env)

ERROR: braces {} are necessary for all arms of this statement
#131: FILE: target/ppc/translate_init.c:8289:
+    if (version >= BOOK3S_CPU_POWER9)
[...]
+    else
[...]

total: 6 errors, 0 warnings, 96 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 10/17: target/ppc/POWER9: Add POWER9 mmu fault handler...
ERROR: Error messages should not contain newlines
#135: FILE: target/ppc/mmu_helper.c:2963:
+        error_report("Guest Radix Support Unimplemented\n");

total: 1 errors, 0 warnings, 110 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 11/17: target/ppc/POWER9: Update to new pte format for POWER9 
accesses...
ERROR: spaces required around that '/' (ctx:VxV)
#280: FILE: target/ppc/mmu-hash64.h:159:
+        pte.pte1 = ldq_p((const void *)(uintptr_t)addr + HASH_PTE_SIZE_64/2);
                                                                          ^

ERROR: spaces required around that '/' (ctx:VxV)
#284: FILE: target/ppc/mmu-hash64.h:162:
+        pte.pte1 = ldq_phys(CPU(cpu)->as, addr + HASH_PTE_SIZE_64/2);
                                                                  ^

total: 2 errors, 0 warnings, 253 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 12/17: target/ppc/POWER9: Add POWER9 pa-features definition...
Checking PATCH 13/17: target/ppc/POWER9: Add cpu_has_work function for POWER9...
Checking PATCH 14/17: target/ppc/debug: Print LPCR register value if register 
exists...
Checking PATCH 15/17: tcg/POWER9: NOOP the cp_abort instruction...
ERROR: do not use C99 // comments
#27: FILE: target/ppc/translate.c:6171:
+    // Do Nothing

total: 1 errors, 0 warnings, 17 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 16/17: target/ppc/mmu_hash64: Fix printing unsigned as signed 
int...
Checking PATCH 17/17: target/ppc/mmu_hash64: Fix incorrect shift value in amr 
calculation...
=== OUTPUT END ===

Test command exited with code: 1


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