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[Qemu-ppc] [RFC PATCH 12/17] target/ppc/POWER9: Add POWER9 pa-features d
From: |
Suraj Jitindar Singh |
Subject: |
[Qemu-ppc] [RFC PATCH 12/17] target/ppc/POWER9: Add POWER9 pa-features definition |
Date: |
Fri, 13 Jan 2017 17:28:18 +1100 |
Add a pa-features definition which includes all of the new fields which
have been added, note we don't claim support for any of these new features
at this stage.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
---
hw/ppc/spapr.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 45bd2de..35799da 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -357,6 +357,20 @@ static void spapr_populate_pa_features(CPUPPCState *env,
void *fdt, int offset)
0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
+ /* Currently we don't advertise any of the "new" ISAv3.00 functionality */
+ uint8_t pa_features_300[] = { 64, 0,
+ 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
+ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
+ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 - 29 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 35 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 - 41 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 - 47 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 - 53 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 - 59 */
+ 0x00, 0x00, 0x00, 0x00 }; /* 60 - 63 */
+
uint8_t *pa_features;
size_t pa_size;
@@ -371,6 +385,10 @@ static void spapr_populate_pa_features(CPUPPCState *env,
void *fdt, int offset)
pa_features = pa_features_207;
pa_size = sizeof(pa_features_207);
break;
+ case POWERPC_MMU_3_00:
+ pa_features = pa_features_300;
+ pa_size = sizeof(pa_features_300);
+ break;
default:
return;
}
--
2.5.5
- [Qemu-ppc] [RFC PATCH 06/17] target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv, (continued)
- [Qemu-ppc] [RFC PATCH 06/17] target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 08/17] target/ppc/POWER9: Add external partition table pointer to cpu state, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 07/17] target/ppc/POWER9: Add partition table pointer to sPAPRMachineState, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 09/17] target/ppc/POWER9: Remove SDR1 register, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 10/17] target/ppc/POWER9: Add POWER9 mmu fault handler, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 12/17] target/ppc/POWER9: Add POWER9 pa-features definition,
Suraj Jitindar Singh <=
- [Qemu-ppc] [RFC PATCH 11/17] target/ppc/POWER9: Update to new pte format for POWER9 accesses, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 13/17] target/ppc/POWER9: Add cpu_has_work function for POWER9, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 14/17] target/ppc/debug: Print LPCR register value if register exists, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 15/17] tcg/POWER9: NOOP the cp_abort instruction, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 16/17] target/ppc/mmu_hash64: Fix printing unsigned as signed int, Suraj Jitindar Singh, 2017/01/13
- [Qemu-ppc] [RFC PATCH 17/17] target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation, Suraj Jitindar Singh, 2017/01/13
- Re: [Qemu-ppc] [Qemu-devel] [RFC PATCH 00/17] target/ppc: Implement POWER9 pseries tcg legacy kernel support, no-reply, 2017/01/13