Re: [Qemu-ppc] [PATCH 03/14] target-ppc: Use float64 arg in helper_compute_fprf()

[Nikunj A Dadhania]

David Gibson <address@hidden> writes:

> [ Unknown signature status ]
> On Thu, Jan 05, 2017 at 04:56:08PM +0530, Nikunj A Dadhania wrote:
>> From: Bharata B Rao <address@hidden>
>> 
>> Use float64 argument instead of unit64_t in helper_compute_fprf()
>> This allows code in helper_compute_fprf() to be reused later to
>> work with float128 argument too.
>> 
>> Signed-off-by: Bharata B Rao <address@hidden>
>> Signed-off-by: Nikunj A Dadhania <address@hidden>
>
> Uh.. how can this possibly be correct, without updating the callers of
> helper_compute_fprf()?

Before the patch

   1791 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, r2sp)               
     \
   1792 void helper_##name(CPUPPCState *env, uint32_t opcode)                   
     \
   1793 {                                                                       
     \

[SNIP]

   1816                                                                         
     \
   1817         if (r2sp) {                                                     
     \
   1818             xt.fld = helper_frsp(env, xt.fld);                          
     \
   1819         }                                                               
     \
   1820                                                                         
     \
   1821         if (sfprf) {                                                    
     \
   1822             helper_compute_fprf(env, xt.fld);                           
     \

[SNIP]

   1829 VSX_ADD_SUB(xsadddp, add, 1, float64, VsrD(0), 1, 0)
   1830 VSX_ADD_SUB(xsaddsp, add, 1, float64, VsrD(0), 1, 1)
   1831 VSX_ADD_SUB(xvadddp, add, 2, float64, VsrD(i), 0, 0)
   1832 VSX_ADD_SUB(xvaddsp, add, 4, float32, VsrW(i), 0, 0)
   1833 VSX_ADD_SUB(xssubdp, sub, 1, float64, VsrD(0), 1, 0)


So we use xt.fld, which in turn will be xt.float64/xt.float32 etc. I
have seen all the other path, should be fine.
target/ppc/fpu_helper.c:1877:            helper_compute_fprf(env, xt.fld);      
                          \
target/ppc/fpu_helper.c:1931:            helper_compute_fprf(env, xt.fld);      
                           \
target/ppc/fpu_helper.c:1972:            helper_compute_fprf(env, xt.fld);      
                           \
target/ppc/fpu_helper.c:2021:            helper_compute_fprf(env, xt.fld);      
                          \
target/ppc/fpu_helper.c:2071:            helper_compute_fprf(env, xt.fld);      
                          \
target/ppc/fpu_helper.c:2271:            helper_compute_fprf(env, xt_out.fld);  
                           \
target/ppc/fpu_helper.c:2661:            helper_compute_fprf(env, 
ttp##_to_float64(xt.tfld,     \
target/ppc/fpu_helper.c:2772:            helper_compute_fprf(env, xt.tfld);     
                     \
target/ppc/fpu_helper.c:2828:            helper_compute_fprf(env, xt.fld);      
                    \


Except the below one, the register that we pass comes as i64 via the
helper:

target/ppc/helper.h:64:DEF_HELPER_2(compute_fprf, void, env, i64)

Regards
Nikunj