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[Qemu-ppc] [PATCH 03/14] target-ppc: Use float64 arg in helper_compute_f
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-ppc] [PATCH 03/14] target-ppc: Use float64 arg in helper_compute_fprf() |
Date: |
Thu, 5 Jan 2017 16:56:08 +0530 |
From: Bharata B Rao <address@hidden>
Use float64 argument instead of unit64_t in helper_compute_fprf()
This allows code in helper_compute_fprf() to be reused later to
work with float128 argument too.
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
---
target-ppc/fpu_helper.c | 16 +++++++---------
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 1ccd5e6..4da991a 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -66,23 +66,21 @@ static inline int ppc_float64_get_unbiased_exp(float64 f)
return ((f >> 52) & 0x7FF) - 1023;
}
-void helper_compute_fprf(CPUPPCState *env, uint64_t arg)
+void helper_compute_fprf(CPUPPCState *env, float64 arg)
{
- CPU_DoubleU farg;
int isneg;
int fprf;
- farg.ll = arg;
- isneg = float64_is_neg(farg.d);
- if (unlikely(float64_is_any_nan(farg.d))) {
- if (float64_is_signaling_nan(farg.d, &env->fp_status)) {
+ isneg = float64_is_neg(arg);
+ if (unlikely(float64_is_any_nan(arg))) {
+ if (float64_is_signaling_nan(arg, &env->fp_status)) {
/* Signaling NaN: flags are undefined */
fprf = 0x00;
} else {
/* Quiet NaN */
fprf = 0x11;
}
- } else if (unlikely(float64_is_infinity(farg.d))) {
+ } else if (unlikely(float64_is_infinity(arg))) {
/* +/- infinity */
if (isneg) {
fprf = 0x09;
@@ -90,7 +88,7 @@ void helper_compute_fprf(CPUPPCState *env, uint64_t arg)
fprf = 0x05;
}
} else {
- if (float64_is_zero(farg.d)) {
+ if (float64_is_zero(arg)) {
/* +/- zero */
if (isneg) {
fprf = 0x12;
@@ -98,7 +96,7 @@ void helper_compute_fprf(CPUPPCState *env, uint64_t arg)
fprf = 0x02;
}
} else {
- if (isden(farg.d)) {
+ if (isden(arg)) {
/* Denormalized numbers */
fprf = 0x10;
} else {
--
2.7.4
- Re: [Qemu-ppc] [PATCH 02/14] target-ppc: Add xxinsertw instruction, (continued)
- [Qemu-ppc] [PATCH 06/14] target-ppc: Add xsaddqp instructions, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 01/14] target-ppc: Add xxextractuw instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 09/14] target-ppc: Add xscvdpqp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 08/14] target-ppc: Use correct precision for FPRF setting, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 04/14] target-ppc: Replace isden by float64_is_zero_or_denormal, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 07/14] target-ppc: Add xscvdphp, xscvhpdp, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 10/14] target-ppc: Add xscvqpdp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 03/14] target-ppc: Use float64 arg in helper_compute_fprf(),
Nikunj A Dadhania <=
- [Qemu-ppc] [PATCH 13/14] target-ppc: Add xsxsigdp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 14/14] target-ppc: Add xsxsigqp instructions, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 12/14] target-ppc: Add xsxexpqp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 11/14] target-ppc: Add xsxexpdp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 05/14] target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64, Nikunj A Dadhania, 2017/01/05
- Re: [Qemu-ppc] [PATCH 00/14] POWER9 TCG enablements - part10, David Gibson, 2017/01/05