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[Qemu-ppc] [PATCH 12/14] target-ppc: Add xsxexpqp instruction
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-ppc] [PATCH 12/14] target-ppc: Add xsxexpqp instruction |
Date: |
Thu, 5 Jan 2017 16:56:17 +0530 |
xsxexpqp: VSX Scalar Extract Exponent Quad Precision
Signed-off-by: Nikunj A Dadhania <address@hidden>
---
target-ppc/translate/vsx-impl.inc.c | 15 +++++++++++++++
target-ppc/translate/vsx-ops.inc.c | 1 +
2 files changed, 16 insertions(+)
diff --git a/target-ppc/translate/vsx-impl.inc.c
b/target-ppc/translate/vsx-impl.inc.c
index b8ff31e..514a273 100644
--- a/target-ppc/translate/vsx-impl.inc.c
+++ b/target-ppc/translate/vsx-impl.inc.c
@@ -1227,6 +1227,21 @@ static void gen_xsxexpdp(DisasContext *ctx)
tcg_gen_shri_i64(rt, cpu_vsrh(xB(ctx->opcode)), 52);
tcg_gen_andi_i64(rt, rt, 0x7FF);
}
+
+static void gen_xsxexpqp(DisasContext *ctx)
+{
+ TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32);
+ TCGv_i64 xtl = cpu_vsrl(rD(ctx->opcode) + 32);
+ TCGv_i64 xbh = cpu_vsrh(rB(ctx->opcode) + 32);
+
+ if (unlikely(!ctx->vsx_enabled)) {
+ gen_exception(ctx, POWERPC_EXCP_VSXU);
+ return;
+ }
+ tcg_gen_shri_i64(xth, xbh, 48);
+ tcg_gen_andi_i64(xth, xth, 0x7FFF);
+ tcg_gen_movi_i64(xtl, 0);
+}
#endif
#undef GEN_XX2FORM
diff --git a/target-ppc/translate/vsx-ops.inc.c
b/target-ppc/translate/vsx-ops.inc.c
index 2243a1f..2ea8ce4 100644
--- a/target-ppc/translate/vsx-ops.inc.c
+++ b/target-ppc/translate/vsx-ops.inc.c
@@ -117,6 +117,7 @@ GEN_VSX_XFORM_300_EO(xscvqpdp, 0x04, 0x1A, 0x14, 0x0),
#ifdef TARGET_PPC64
GEN_XX2FORM_EO(xsxexpdp, 0x16, 0x15, 0x00, PPC2_ISA300),
+GEN_VSX_XFORM_300_EO(xsxexpqp, 0x04, 0x19, 0x02, 0x00000001),
#endif
GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
--
2.7.4
- Re: [Qemu-ppc] [PATCH 04/14] target-ppc: Replace isden by float64_is_zero_or_denormal, (continued)
- [Qemu-ppc] [PATCH 13/14] target-ppc: Add xsxsigdp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 14/14] target-ppc: Add xsxsigqp instructions, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 12/14] target-ppc: Add xsxexpqp instruction,
Nikunj A Dadhania <=
- [Qemu-ppc] [PATCH 11/14] target-ppc: Add xsxexpdp instruction, Nikunj A Dadhania, 2017/01/05
- [Qemu-ppc] [PATCH 05/14] target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64, Nikunj A Dadhania, 2017/01/05
- Re: [Qemu-ppc] [PATCH 00/14] POWER9 TCG enablements - part10, David Gibson, 2017/01/05