Re: [Qemu-ppc] [PATCH 3/4] target-ppc: add vrldnmi and vrlwmi instructions

[Nikunj A Dadhania]

Richard Henderson <address@hidden> writes:


> We already have rol32 and rol64.
>
> Which I see are broken for shift == 0.

I tried with different shift (including 0) in a test program, and the
result is as expected:

0: ccddeeff

static inline unsigned int rol32(unsigned int word, unsigned int shift)
{
  return (word << shift) | (word >> (32 - shift));
}

void main(void)
{
  unsigned int value32 = 0xCCDDEEFF;

  for (int i = 0; i < 32; i++)
    printf("%d: %08x\n", i, rol32(value32, i));
}

> Let's please fix that, as a separate patch, like so:
>
>   return (word << shift) | (word >> ((32 - shift) & 31));

Doesn't seems to be necessary.

Regards
Nikunj