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[Qemu-ppc] [PATCH v1 0/3] POWER9 TCG enablements - part7
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-ppc] [PATCH v1 0/3] POWER9 TCG enablements - part7 |
Date: |
Tue, 25 Oct 2016 11:49:49 +0530 |
This series contains 8 new instructions for POWER9 ISA3.0
VSX Scalar compare
Vector Rotate Left Dword
Vector Rotate Left Word
Changelog:
v0:
* Use extract32 and extract64 helper
* Use rol32 and rol64 helper
Patches:
01:
xscmpeqdp: VSX Scalar Compare Equal Double-Precision
xscmpgedp: VSX Scalar Compare Greater Than or Equal Double-Precision
xscmpgtdp: VSX Scalar Compare Greater Than Double-Precision
xscmpnedp: VSX Scalar Compare Not Equal Double-Precision
02:
vrldmi: Vector Rotate Left Dword then Mask Insert
vrlwmi: Vector Rotate Left Word then Mask Insert
03:
vrldnm: Vector Rotate Left Doubleword then AND with Mask
vrlwnm: Vector Rotate Left Word then AND with Mask
Bharata B Rao (1):
target-ppc: add vrldnm and vrlwnm instructions
Gautham R. Shenoy (1):
target-ppc: add vrldnmi and vrlwmi instructions
Sandipan Das (1):
target-ppc: add xscmp[eq,gt,ge,ne]dp instructions
disas/ppc.c | 4 ++
target-ppc/fpu_helper.c | 52 +++++++++++++++++++++++++
target-ppc/helper.h | 8 ++++
target-ppc/int_helper.c | 77 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 12 ++++++
target-ppc/translate/vmx-ops.inc.c | 8 ++--
target-ppc/translate/vsx-impl.inc.c | 4 ++
target-ppc/translate/vsx-ops.inc.c | 4 ++
8 files changed, 165 insertions(+), 4 deletions(-)
--
2.7.4
- [Qemu-ppc] [PATCH v1 0/3] POWER9 TCG enablements - part7,
Nikunj A Dadhania <=