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Re: [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip |
Date: |
Wed, 12 Oct 2016 10:53:12 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 |
On 10/11/2016 12:24 PM, David Gibson wrote:
> On Mon, Oct 10, 2016 at 02:56:25PM +0200, Cédric Le Goater wrote:
>>
>>>> @@ -227,11 +227,44 @@ static void ppc_powernv_init(MachineState *machine)
>>>> snprintf(chip_name, sizeof(chip_name), "chip[%d]", CHIP_HWID(i));
>>>> object_property_add_child(OBJECT(pnv), chip_name, chip,
>>>> &error_fatal);
>>>> object_property_set_int(chip, CHIP_HWID(i), "chip-id",
>>>> &error_fatal);
>>>> + object_property_set_int(chip, smp_cores, "nr-cores",
>>>> &error_fatal);
>>>> + /*
>>>> + * We could customize cores_mask for the chip here. May be
>>>> + * using a powernv machine property, like 'num-chips'. Let the
>>>> + * chip choose the default for now.
>>>
>>> I don't think you need any special mechanism for this. If you just
>>> remove this explicit assignment the chip default will apply, but the
>>> user can alter it using -global.
>>
>> Using a command line with :
>>
>> -global powernv-chip-POWER8.cores-mask=0x7070
>>
>> would work for one chip but not for more. Let's start with that, I will
>> remove the comment for now. multiple chip is for later.
>
> Well, it works for more than one chip if you want the same mask for
> each of them. If you want different masks, I think you can still do
> it with -set, but working out the right arguments can be a PITA.
That would be the best solution but I did not find a way to address one
chip object to do a "qom set".
(qemu) info qom-tree
/machine (powernv-machine)
/unattached (container)
/system[0] (qemu:memory-region)
/sysbus (System)
/ppc_powernv.ram[0] (qemu:memory-region)
/io[0] (qemu:memory-region)
/peripheral-anon (container)
/peripheral (container)
/chip[1] (powernv-chip-POWER8)
...
/chip[0] (powernv-chip-POWER8)
...
We will have a similar need with the ram to spread the contents on
the chips.
C.
- [Qemu-ppc] [PATCH v4 02/20] ppc/pnv: add a PnvChip object, (continued)
- [Qemu-ppc] [PATCH v4 02/20] ppc/pnv: add a PnvChip object, Cédric Le Goater, 2016/10/03
- [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip, Cédric Le Goater, 2016/10/03
- Re: [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip, Cédric Le Goater, 2016/10/10
- Re: [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip, David Gibson, 2016/10/11
- Re: [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip,
Cédric Le Goater <=
- Re: [Qemu-ppc] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip, David Gibson, 2016/10/13
[Qemu-ppc] [PATCH v4 04/20] ppc/pnv: add a PIR handler to PnvChip, Cédric Le Goater, 2016/10/03
[Qemu-ppc] [PATCH v4 05/20] ppc/pnv: add a PnvCore object, Cédric Le Goater, 2016/10/03
[Qemu-ppc] [PATCH v4 06/20] ppc/pnv: add XSCOM infrastructure, Cédric Le Goater, 2016/10/03