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[Qemu-ppc] [PULL 21/29] target-ppc/kvm: Enable transactional memory on P
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 21/29] target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too |
Date: |
Thu, 6 Oct 2016 23:03:07 +1100 |
From: Thomas Huth <address@hidden>
Transactional memory is also supported on POWER8 KVM-HV if the
KVM_CAP_PPC_HTM is not available in the kernel yet, so add a hack
to allow TM here, too.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/kvm.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 83482b4..9c4834c 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -570,11 +570,18 @@ int kvm_arch_init_vcpu(CPUState *cs)
idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, kvm_kick_cpu, cpu);
- /* Some targets support access to KVM's guest TLB. */
switch (cenv->mmu_model) {
case POWERPC_MMU_BOOKE206:
+ /* This target supports access to KVM's guest TLB */
ret = kvm_booke206_tlb_init(cpu);
break;
+ case POWERPC_MMU_2_07:
+ if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) {
+ /* KVM-HV has transactional memory on POWER8 also without the
+ * KVM_CAP_PPC_HTM extension, so enable it here instead. */
+ cap_htm = true;
+ }
+ break;
default:
break;
}
--
2.7.4
- [Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar, (continued)
- [Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 10/29] target-ppc: improve stxvw4x implementation, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 03/29] pseries: Add 2.8 machine type, set up compatibility macros, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 13/29] target-ppc: add lxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 14/29] target-ppc: add stxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 20/29] target-ppc/kvm: Add a wrapper function to check for KVM-PR, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 16/29] target-ppc: add vector compare not equal instructions, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 05/29] hw/ppc/spapr: Fix the selection of the processor features, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 01/29] spapr_vscsi: fix build error introduced by f19661c8, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 11/29] target-ppc: add lxvh8x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 21/29] target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too,
David Gibson <=
- [Qemu-ppc] [PULL 19/29] MAINTAINERS: Add two more ppc related files, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 25/29] libqos: use generic qtest_shutdown(), David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 18/29] target-ppc: Implement mtvsrws instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 28/29] tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe test, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 22/29] target-ppc: fix vmx instruction type/type2, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 06/29] ppc: Check the availability of transactional memory, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 27/29] spapr: fix check of cpu alias name in spapr_get_cpu_core_type(), David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 29/29] hw/ppc/spapr: Use POWER8 by default for the pseries-2.8 machine, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 12/29] target-ppc: add stxvh8x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 23/29] libqos: add PPC64 PCI support, David Gibson, 2016/10/06