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[Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar |
Date: |
Thu, 6 Oct 2016 23:03:01 +1100 |
From: Avinesh Kumar <address@hidden>
cmpl: invalid bit mask should be 0x00400001
bctar: invalid bit mask should be 0x0000E000
Signed-off-by: Avinesh Kumar <address@hidden>
Signed-off-by: Rajalakshmi Srinivasaraghavan <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 8eefd82..dab8f19 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6203,7 +6203,7 @@ static opcode_t opcodes[] = {
GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE),
GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER),
GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER),
-GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400000, PPC_INTEGER),
+GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400001, PPC_INTEGER),
GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER),
#if defined(TARGET_PPC64)
GEN_HANDLER_E(cmpeqb, 0x1F, 0x00, 0x07, 0x00600000, PPC_NONE, PPC2_ISA300),
@@ -6297,7 +6297,7 @@ GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW),
GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW),
-GEN_HANDLER_E(bctar, 0x13, 0x10, 0x11, 0, PPC_NONE, PPC2_BCTAR_ISA207),
+GEN_HANDLER_E(bctar, 0x13, 0x10, 0x11, 0x0000E000, PPC_NONE,
PPC2_BCTAR_ISA207),
GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER),
GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW),
#if defined(TARGET_PPC64)
--
2.7.4
- [Qemu-ppc] [PULL 00/29] ppc-for-2.8 queue 20161006, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 02/29] tests: Test IPv6 and ppc64 in the PXE tester, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 07/29] target-ppc: Implement mfvsrld instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 04/29] hw/ppc/spapr: Move code related to "ibm, pa-features" to a separate function, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 08/29] target-ppc: Implement mtvsrdd instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar,
David Gibson <=
- [Qemu-ppc] [PULL 10/29] target-ppc: improve stxvw4x implementation, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 03/29] pseries: Add 2.8 machine type, set up compatibility macros, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 13/29] target-ppc: add lxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 14/29] target-ppc: add stxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 20/29] target-ppc/kvm: Add a wrapper function to check for KVM-PR, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 16/29] target-ppc: add vector compare not equal instructions, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 05/29] hw/ppc/spapr: Fix the selection of the processor features, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 01/29] spapr_vscsi: fix build error introduced by f19661c8, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 11/29] target-ppc: add lxvh8x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 21/29] target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too, David Gibson, 2016/10/06