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[Qemu-ppc] [PULL 05/29] hw/ppc/spapr: Fix the selection of the processor
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 05/29] hw/ppc/spapr: Fix the selection of the processor features |
Date: |
Thu, 6 Oct 2016 23:02:51 +1100 |
From: Thomas Huth <address@hidden>
The current code uses pa_features_206 for POWERPC_MMU_2_06, and
for everything else, it uses pa_features_207. This is bad in some
cases because there is also a "degraded" MMU version of ISA 2.06,
called POWERPC_MMU_2_06a, which should of course use the flags for
2.06 instead. And there is also the possibility that the user runs
the pseries machine with a POWER5+ or even 970 processor. In that
case we certainly do not want to set the flags for 2.07, and rather
simply skip the setting of the pa-features property instead.
Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8048f92..8654108 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -559,12 +559,19 @@ static void spapr_populate_pa_features(CPUPPCState *env,
void *fdt, int offset)
uint8_t *pa_features;
size_t pa_size;
- if (env->mmu_model == POWERPC_MMU_2_06) {
+ switch (env->mmu_model) {
+ case POWERPC_MMU_2_06:
+ case POWERPC_MMU_2_06a:
pa_features = pa_features_206;
pa_size = sizeof(pa_features_206);
- } else { /* env->mmu_model == POWERPC_MMU_2_07 */
+ break;
+ case POWERPC_MMU_2_07:
+ case POWERPC_MMU_2_07a:
pa_features = pa_features_207;
pa_size = sizeof(pa_features_207);
+ break;
+ default:
+ return;
}
if (env->ci_large_pages) {
--
2.7.4
- [Qemu-ppc] [PULL 07/29] target-ppc: Implement mfvsrld instruction, (continued)
- [Qemu-ppc] [PULL 07/29] target-ppc: Implement mfvsrld instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 04/29] hw/ppc/spapr: Move code related to "ibm, pa-features" to a separate function, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 08/29] target-ppc: Implement mtvsrdd instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 10/29] target-ppc: improve stxvw4x implementation, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 03/29] pseries: Add 2.8 machine type, set up compatibility macros, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 13/29] target-ppc: add lxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 14/29] target-ppc: add stxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 20/29] target-ppc/kvm: Add a wrapper function to check for KVM-PR, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 16/29] target-ppc: add vector compare not equal instructions, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 05/29] hw/ppc/spapr: Fix the selection of the processor features,
David Gibson <=
- [Qemu-ppc] [PULL 01/29] spapr_vscsi: fix build error introduced by f19661c8, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 11/29] target-ppc: add lxvh8x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 21/29] target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 19/29] MAINTAINERS: Add two more ppc related files, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 25/29] libqos: use generic qtest_shutdown(), David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 18/29] target-ppc: Implement mtvsrws instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 28/29] tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe test, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 22/29] target-ppc: fix vmx instruction type/type2, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 06/29] ppc: Check the availability of transactional memory, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 27/29] spapr: fix check of cpu alias name in spapr_get_cpu_core_type(), David Gibson, 2016/10/06