[Qemu-ppc] [PULL 22/29] target-ppc: fix vmx instruction type/type2

[David Gibson]

From: Nikunj A Dadhania <address@hidden>

A few of the new instructions added inadvertently changed the type of
old instruction(PPC_ALTIVEC) to PPC2_ALTIVEC_207 in the dual form
declaration.

commit: b5d569a1 (target-ppc: add vector extract instructions)
commit: e7b1e06f (target-ppc: add vector insert instructions)
commit: 3aa56a19 (target-ppc: add vector compare not equal instructions)

New ISA 3.0 instructions added:
    vextractub     PPC_NONE     PPC2_ISA300
    vextractuh     PPC_NONE     PPC2_ISA300
    vextractuw     PPC_NONE     PPC2_ISA300
    vinsertb       PPC_NONE     PPC2_ISA300
    vinserth       PPC_NONE     PPC2_ISA300
    vinsertw       PPC_NONE     PPC2_ISA300
    vcmpneb        PPC_NONE     PPC2_ISA300
    vcmpneh        PPC_NONE     PPC2_ISA300
    vcmpnew        PPC_NONE     PPC2_ISA300

Affected older instructions:
    vspltb         PPC_ALTIVEC  PPC_NONE
    vsplth         PPC_ALTIVEC  PPC_NONE
    vspltw         PPC_ALTIVEC  PPC_NONE
    vspltisb       PPC_ALTIVEC  PPC_NONE
    vspltish       PPC_ALTIVEC  PPC_NONE
    vspltisw       PPC_ALTIVEC  PPC_NONE
    vcmpequb       PPC_ALTIVEC  PPC_NONE
    vcmpequh       PPC_ALTIVEC  PPC_NONE
    vcmpequw       PPC_ALTIVEC  PPC_NONE

Change the instruction type/type2 for the older instructions back to
what it was(PPC_ALTIVEC).

CC: Rajalakshmi Srinivasaraghavan <address@hidden>
Reported-by: Bharata B Rao <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
 target-ppc/translate/vmx-impl.inc.c | 30 +++++++++++++++---------------
 target-ppc/translate/vmx-ops.inc.c  | 18 +++++++++---------
 2 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/target-ppc/translate/vmx-impl.inc.c 
b/target-ppc/translate/vmx-impl.inc.c
index f646e85..25cd073 100644
--- a/target-ppc/translate/vmx-impl.inc.c
+++ b/target-ppc/translate/vmx-impl.inc.c
@@ -514,11 +514,11 @@ GEN_VXRFORM(vcmpneb, 3, 0)
 GEN_VXRFORM(vcmpneh, 3, 1)
 GEN_VXRFORM(vcmpnew, 3, 2)
 
-GEN_VXRFORM_DUAL(vcmpequb, PPC_NONE, PPC2_ALTIVEC_207, \
+GEN_VXRFORM_DUAL(vcmpequb, PPC_ALTIVEC, PPC_NONE, \
                  vcmpneb, PPC_NONE, PPC2_ISA300)
-GEN_VXRFORM_DUAL(vcmpequh, PPC_NONE, PPC2_ALTIVEC_207, \
+GEN_VXRFORM_DUAL(vcmpequh, PPC_ALTIVEC, PPC_NONE, \
                  vcmpneh, PPC_NONE, PPC2_ISA300)
-GEN_VXRFORM_DUAL(vcmpequw, PPC_NONE, PPC2_ALTIVEC_207, \
+GEN_VXRFORM_DUAL(vcmpequw, PPC_ALTIVEC, PPC_NONE, \
                  vcmpnew, PPC_NONE, PPC2_ISA300)
 GEN_VXRFORM_DUAL(vcmpeqfp, PPC_ALTIVEC, PPC_NONE, \
                  vcmpequd, PPC_NONE, PPC2_ALTIVEC_207)
@@ -712,18 +712,18 @@ GEN_VXFORM_UIMM_ENV(vcfux, 5, 12);
 GEN_VXFORM_UIMM_ENV(vcfsx, 5, 13);
 GEN_VXFORM_UIMM_ENV(vctuxs, 5, 14);
 GEN_VXFORM_UIMM_ENV(vctsxs, 5, 15);
-GEN_VXFORM_DUAL(vspltb, PPC_NONE, PPC2_ALTIVEC_207,
-                      vextractub, PPC_NONE, PPC2_ISA300);
-GEN_VXFORM_DUAL(vsplth, PPC_NONE, PPC2_ALTIVEC_207,
-                      vextractuh, PPC_NONE, PPC2_ISA300);
-GEN_VXFORM_DUAL(vspltw, PPC_NONE, PPC2_ALTIVEC_207,
-                      vextractuw, PPC_NONE, PPC2_ISA300);
-GEN_VXFORM_DUAL(vspltisb, PPC_NONE, PPC2_ALTIVEC_207,
-                      vinsertb, PPC_NONE, PPC2_ISA300);
-GEN_VXFORM_DUAL(vspltish, PPC_NONE, PPC2_ALTIVEC_207,
-                      vinserth, PPC_NONE, PPC2_ISA300);
-GEN_VXFORM_DUAL(vspltisw, PPC_NONE, PPC2_ALTIVEC_207,
-                      vinsertw, PPC_NONE, PPC2_ISA300);
+GEN_VXFORM_DUAL(vspltb, PPC_ALTIVEC, PPC_NONE,
+                vextractub, PPC_NONE, PPC2_ISA300);
+GEN_VXFORM_DUAL(vsplth, PPC_ALTIVEC, PPC_NONE,
+                vextractuh, PPC_NONE, PPC2_ISA300);
+GEN_VXFORM_DUAL(vspltw, PPC_ALTIVEC, PPC_NONE,
+                vextractuw, PPC_NONE, PPC2_ISA300);
+GEN_VXFORM_DUAL(vspltisb, PPC_ALTIVEC, PPC_NONE,
+                vinsertb, PPC_NONE, PPC2_ISA300);
+GEN_VXFORM_DUAL(vspltish, PPC_ALTIVEC, PPC_NONE,
+                vinserth, PPC_NONE, PPC2_ISA300);
+GEN_VXFORM_DUAL(vspltisw, PPC_ALTIVEC, PPC_NONE,
+                vinsertw, PPC_NONE, PPC2_ISA300);
 
 static void gen_vsldoi(DisasContext *ctx)
 {
diff --git a/target-ppc/translate/vmx-ops.inc.c 
b/target-ppc/translate/vmx-ops.inc.c
index b63e33d..ac1dc9b 100644
--- a/target-ppc/translate/vmx-ops.inc.c
+++ b/target-ppc/translate/vmx-ops.inc.c
@@ -194,26 +194,26 @@ GEN_VXRFORM_DUAL(vcmpeqfp, vcmpequd, 3, 3, PPC_ALTIVEC, 
PPC_NONE)
 GEN_VXRFORM(vcmpgefp, 3, 7)
 GEN_VXRFORM_DUAL(vcmpgtfp, vcmpgtud, 3, 11, PPC_ALTIVEC, PPC_NONE)
 GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE)
-GEN_VXRFORM_DUAL(vcmpequb, vcmpneb, 3, 0, PPC_NONE, PPC2_ALTIVEC_207)
-GEN_VXRFORM_DUAL(vcmpequh, vcmpneh, 3, 1, PPC_NONE, PPC2_ALTIVEC_207)
-GEN_VXRFORM_DUAL(vcmpequw, vcmpnew, 3, 2, PPC_NONE, PPC2_ALTIVEC_207)
+GEN_VXRFORM_DUAL(vcmpequb, vcmpneb, 3, 0, PPC_ALTIVEC, PPC_NONE)
+GEN_VXRFORM_DUAL(vcmpequh, vcmpneh, 3, 1, PPC_ALTIVEC, PPC_NONE)
+GEN_VXRFORM_DUAL(vcmpequw, vcmpnew, 3, 2, PPC_ALTIVEC, PPC_NONE)
 
 #define GEN_VXFORM_DUAL_INV(name0, name1, opc2, opc3, inval0, inval1, type) \
 GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, \
                                                                PPC_NONE)
 GEN_VXFORM_DUAL_INV(vspltb, vextractub, 6, 8, 0x00000000, 0x100000,
-                                               PPC2_ALTIVEC_207),
+                                               PPC_ALTIVEC),
 GEN_VXFORM_DUAL_INV(vsplth, vextractuh, 6, 9, 0x00000000, 0x100000,
-                                               PPC2_ALTIVEC_207),
+                                               PPC_ALTIVEC),
 GEN_VXFORM_DUAL_INV(vspltw, vextractuw, 6, 10, 0x00000000, 0x100000,
-                                               PPC2_ALTIVEC_207),
+                                               PPC_ALTIVEC),
 GEN_VXFORM_300_EXT(vextractd, 6, 11, 0x100000),
 GEN_VXFORM_DUAL_INV(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000,
-                                               PPC2_ALTIVEC_207),
+                                               PPC_ALTIVEC),
 GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000,
-                                               PPC2_ALTIVEC_207),
+                                               PPC_ALTIVEC),
 GEN_VXFORM_DUAL_INV(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000,
-                                               PPC2_ALTIVEC_207),
+                                               PPC_ALTIVEC),
 GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000),
 GEN_VXFORM_300_EO(vctzb, 0x01, 0x18, 0x1C),
 GEN_VXFORM_300_EO(vctzh, 0x01, 0x18, 0x1D),
-- 
2.7.4