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Re: [PATCH v1 01/19] target/arm: Make cpu_exclusive_high hold the high b
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v1 01/19] target/arm: Make cpu_exclusive_high hold the high bits |
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Date: |
Thu, 23 Feb 2023 17:08:43 +0000 |
On Thu, 23 Feb 2023 at 16:51, Peter Maydell <peter.maydell@linaro.org> wrote:
> The current state of affairs is arguably broken, because it
> means you can't migrate a guest from a BE host to an LE host,
> because the migration stream contains host-endian-dependent
> data.
...thinking it through, this isn't right. The current code
has cpu_exclusive_high always be the 64-bit word from
the higher of the two addresses. The change proposes
making it be the high part of the guest 128-bit value
(which is different if the guest is in BE mode).
Neither of those definitions depend on the host endianness:
they're just different and we would have to figure out
how to convert between them on migration.
-- PMM
[PATCH v1 02/19] target/arm: Use tcg_gen_qemu_ld_i128 for LDXP, Richard Henderson, 2023/02/15
[PATCH v1 03/19] target/arm: Use tcg_gen_qemu_{st, ld}_i128 for do_fp_{st, ld}, Richard Henderson, 2023/02/15
[PATCH v1 04/19] target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G, Richard Henderson, 2023/02/15
[PATCH v1 07/19] target/arm: Add feature test for FEAT_LSE2, Richard Henderson, 2023/02/15
[PATCH v1 05/19] target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r, Richard Henderson, 2023/02/15