Re: [PATCH v1 04/19] target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G

[Peter Maydell]

On Thu, 16 Feb 2023 at 03:10, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This fixes a bug in that these two insns should have been using atomic
> 16-byte stores, since MTE is ARMv8.5 and LSE2 is mandatory from ARMv8.4.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> diff --git a/tests/tcg/aarch64/mte-7.c b/tests/tcg/aarch64/mte-7.c
> index a981de62d4..04974f9ebb 100644
> --- a/tests/tcg/aarch64/mte-7.c
> +++ b/tests/tcg/aarch64/mte-7.c
> @@ -19,8 +19,7 @@ int main(int ac, char **av)
>      p = (void *)((unsigned long)p | (1ul << 56));
>
>      /* Store tag in sequential granules. */
> -    asm("stg %0, [%0]" : : "r"(p + 0x0ff0));
> -    asm("stg %0, [%0]" : : "r"(p + 0x1000));
> +    asm("stz2g %0, [%0]" : : "r"(p + 0x0ff0));

Why did we need to change the test program ?

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM