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[PATCH v1 07/19] target/arm: Add feature test for FEAT_LSE2
From: |
Richard Henderson |
Subject: |
[PATCH v1 07/19] target/arm: Add feature test for FEAT_LSE2 |
Date: |
Wed, 15 Feb 2023 17:08:42 -1000 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7bc97fece9..2108caf753 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -4049,6 +4049,11 @@ static inline bool isar_feature_aa64_st(const
ARMISARegisters *id)
return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, ST) != 0;
}
+static inline bool isar_feature_aa64_lse2(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, AT) != 0;
+}
+
static inline bool isar_feature_aa64_fwb(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, FWB) != 0;
--
2.34.1
- Re: [PATCH v1 01/19] target/arm: Make cpu_exclusive_high hold the high bits, (continued)
[PATCH v1 02/19] target/arm: Use tcg_gen_qemu_ld_i128 for LDXP, Richard Henderson, 2023/02/15
[PATCH v1 03/19] target/arm: Use tcg_gen_qemu_{st, ld}_i128 for do_fp_{st, ld}, Richard Henderson, 2023/02/15
[PATCH v1 04/19] target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G, Richard Henderson, 2023/02/15
[PATCH v1 07/19] target/arm: Add feature test for FEAT_LSE2,
Richard Henderson <=
[PATCH v1 05/19] target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r, Richard Henderson, 2023/02/15
[PATCH v1 06/19] target/arm: Sink gen_mte_check1 into load/store_exclusive, Richard Henderson, 2023/02/15
[PATCH v1 08/19] target/arm: Add atom_data to DisasContext, Richard Henderson, 2023/02/15
[PATCH v1 09/19] target/arm: Load/store integer pair with one tcg operation, Richard Henderson, 2023/02/15
[PATCH v1 10/19] target/arm: Hoist finalize_memop out of do_gpr_{ld, st}, Richard Henderson, 2023/02/15