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[PULL 43/54] hw/machine: Drop cxl_supported flag as no longer useful
From: |
Michael S. Tsirkin |
Subject: |
[PULL 43/54] hw/machine: Drop cxl_supported flag as no longer useful |
Date: |
Fri, 10 Jun 2022 03:59:09 -0400 |
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
As all the CXL elements have moved to boards that support
CXL, there is no need to maintain a top level flag.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Message-Id: <20220608145440.26106-9-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/boards.h | 1 -
hw/i386/pc.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 031f5f884d..d94edcef28 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -269,7 +269,6 @@ struct MachineClass {
bool ignore_boot_device_suffixes;
bool smbus_no_migration_support;
bool nvdimm_supported;
- bool cxl_supported;
bool numa_mem_supported;
bool auto_enable_numa;
SMPCompatProps smp_props;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a0c0d69698..1b6067ff22 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1804,7 +1804,6 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
mc->nvdimm_supported = true;
mc->smp_props.dies_supported = true;
- mc->cxl_supported = true;
mc->default_ram_id = "pc.ram";
object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
--
MST
- [PULL 30/54] tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs, (continued)
- [PULL 30/54] tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs, Michael S. Tsirkin, 2022/06/10
- [PULL 34/54] tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs, Michael S. Tsirkin, 2022/06/10
- [PULL 32/54] acpi: pc/q35: remove not needed 'if' condition on pci bus, Michael S. Tsirkin, 2022/06/10
- [PULL 31/54] acpi: pc/q35: tpm-tis: fix TPM device scope, Michael S. Tsirkin, 2022/06/10
- [PULL 33/54] acpi: tpm-tis: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML, Michael S. Tsirkin, 2022/06/10
- [PULL 38/54] hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c, Michael S. Tsirkin, 2022/06/10
- [PULL 39/54] tests/acpi: Allow modification of q35 CXL CEDT table., Michael S. Tsirkin, 2022/06/10
- [PULL 37/54] hw/acpi/cxl: Pass in the CXLState directly rather than MachineState, Michael S. Tsirkin, 2022/06/10
- [PULL 40/54] pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup., Michael S. Tsirkin, 2022/06/10
- [PULL 35/54] x86: acpi-build: do not include hw/isa/isa.h directly, Michael S. Tsirkin, 2022/06/10
- [PULL 43/54] hw/machine: Drop cxl_supported flag as no longer useful,
Michael S. Tsirkin <=
- [PULL 42/54] hw/cxl: Move the CXLState from MachineState to machine type specific state., Michael S. Tsirkin, 2022/06/10
- [PULL 36/54] hw/cxl: Make the CXL fixed memory window setup a machine parameter., Michael S. Tsirkin, 2022/06/10
- [PULL 41/54] tests/acpi: Update q35/CEDT.cxl for new memory addresses., Michael S. Tsirkin, 2022/06/10
- [PULL 44/54] pci: fix overflow in snprintf string formatting, Michael S. Tsirkin, 2022/06/10
- [PULL 45/54] hw/cxl: Fix missing write mask for HDM decoder target list registers, Michael S. Tsirkin, 2022/06/10
- [PULL 46/54] hw/acpi/viot: rename build_pci_range_node() to enumerate_pci_host_bridges(), Michael S. Tsirkin, 2022/06/10
- [PULL 47/54] hw/acpi/viot: move the individual PCI host bridge entry generation to a new function, Michael S. Tsirkin, 2022/06/10
- [PULL 48/54] hw/acpi/viot: build array of PCI host bridges before generating VIOT ACPI table, Michael S. Tsirkin, 2022/06/10
- [PULL 49/54] tests/acpi: virt: allow VIOT acpi table changes, Michael S. Tsirkin, 2022/06/10
- [PULL 50/54] hw/acpi/viot: sort VIOT ACPI table entries by PCI host bridge min_bus, Michael S. Tsirkin, 2022/06/10