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[PULL 15/28] target/mips: Remove duplicated check_cp1_enabled() calls in
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PULL 15/28] target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXT |
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Date: |
Wed, 25 Aug 2021 15:01:58 +0200 |
We already call check_cp1_enabled() earlier in the "pre-conditions"
checks for GSLWXC1 and GSLDXC1 in gen_loongson_lsdc2() prologue.
Remove the duplicated calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Message-Id: <20210816001031.1720432-1-f4bug@amsat.org>
---
target/mips/tcg/translate.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 30780deb96f..a58d50e40e2 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -4693,7 +4693,6 @@ static void gen_loongson_lsdc2(DisasContext *ctx, int rt,
break;
#endif
case OPC_GSLWXC1:
- check_cp1_enabled(ctx);
gen_base_offset_addr(ctx, t0, rs, offset);
if (rd) {
gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
@@ -4706,7 +4705,6 @@ static void gen_loongson_lsdc2(DisasContext *ctx, int rt,
break;
#if defined(TARGET_MIPS64)
case OPC_GSLDXC1:
- check_cp1_enabled(ctx);
gen_base_offset_addr(ctx, t0, rs, offset);
if (rd) {
gen_op_addr_add(ctx, t0, cpu_gpr[rd], t0);
--
2.31.1
- [PULL 06/28] target/mips: Introduce generic TRANS() macro for decodetree helpers, (continued)
- [PULL 06/28] target/mips: Introduce generic TRANS() macro for decodetree helpers, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 05/28] target/mips: Rename 'rtype' as 'r', Philippe Mathieu-Daudé, 2021/08/25
- [PULL 07/28] target/mips: Extract NEC Vr54xx helper definitions, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 08/28] target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 09/28] target/mips: Introduce decodetree structure for NEC Vr54xx extension, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 10/28] target/mips: Convert Vr54xx MACC* opcodes to decodetree, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 11/28] target/mips: Convert Vr54xx MUL* opcodes to decodetree, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 12/28] target/mips: Convert Vr54xx MSA* opcodes to decodetree, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 13/28] target/mips: Document Loongson-3A CPU definitions, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 14/28] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 15/28] target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXT,
Philippe Mathieu-Daudé <=
- [PULL 16/28] target/mips: Remove gen_helper_0e3i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 17/28] target/mips: Remove gen_helper_1e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 18/28] target/mips: Use tcg_constant_i32() in gen_helper_0e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 19/28] target/mips: Simplify gen_helper() macros by using tcg_constant_i32(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 20/28] target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 21/28] target/mips: Inline gen_helper_0e0i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 22/28] target/mips: Use tcg_constant_i32() in generate_exception_err(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 23/28] target/mips: Define gen_helper() macros in translate.h, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 24/28] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 25/28] target/mips: Replace GET_LMASK() macro by get_lmask(32) function, Philippe Mathieu-Daudé, 2021/08/25