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Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS in
Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions
Mon, 02 Dec 2019 17:15:48 +0000
On 2019-12-02 16:56, Richard Henderson wrote:
On 12/2/19 4:45 PM, Marc Zyngier wrote:
Annoying that there's a bug in the manual -- FPSID is listed as
group 0 in
plenty of places, except in the pseudo-code for Accessing the FPSID
which uses TID3.
Are you sure? I'm looking at DDI0487E_a,
Or have you spotted a discrepancy
somewhere else (which would be oh-so-surprising...)?
In DDI0487E_a, page G8-6028:
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TID3 == '1'
elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TID3 == '1' then
within the summary documentation for FPSID.
Ah, that was too obvious for me to find ;-). Indeed, this looks totally
bogus. I'll try and poke a few people...
Jazz is not dead. It just smells funny...
[PATCH v2 2/5] target/arm: Honor HCR_EL2.TID1 trapping requirements, Marc Zyngier, 2019/12/01
[PATCH v2 4/5] target/arm: Handle AArch32 CP15 trapping via HSTR_EL2, Marc Zyngier, 2019/12/01
Re: [PATCH v2 0/5] target/arm: More EL2 trapping fixes, Peter Maydell, 2019/12/06