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Re: [Qemu-devel] [PATCH for-4.1 v3 00/17] tcg/ppc: Add vector opcodes


From: no-reply
Subject: Re: [Qemu-devel] [PATCH for-4.1 v3 00/17] tcg/ppc: Add vector opcodes
Date: Tue, 19 Mar 2019 10:40:56 -0700 (PDT)

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Type: series
Subject: [Qemu-devel] [PATCH for-4.1 v3 00/17] tcg/ppc: Add vector opcodes

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   9bc59ffd9e..62a172e6a7  master     -> master
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
b3f85d6804 tcg/ppc: Update vector support to v3.00
d101220c5c tcg/ppc: Update vector support to v2.07
0e0e4d9828 tcg/ppc: Update vector support to v2.06
4f74948f7a tcg/ppc: Support vector multiply
3c5b8415c5 tcg/ppc: Support vector shift by immediate
f7cc7426cd tcg/ppc: Initial backend support for Altivec
65ff7b668b tcg: Add INDEX_op_dup_mem_vec
badd4b84af tcg/aarch64: Implement tcg_out_dupm_vec
7a06ac2a80 tcg/i386: Implement tcg_out_dupm_vec
024ba0bb76 tcg: Add tcg_out_dupm_vec to the backend interface
829ebc1bb4 tcg: Manually expand INDEX_op_dup_vec
74d1ac5ecc tcg: Promote tcg_out_{dup, dupi}_vec to backend interface
1e0bdeae9f tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded
4673251646 tcg: Support cross-class moves without instruction support
fb3eb52955 tcg: Return bool success from tcg_out_mov
a697173b71 tcg: Assert fixed_reg is read-only
bfd7e68436 target/arm: Fill in .opc for cmtst_op

=== OUTPUT BEGIN ===
1/17 Checking commit bfd7e68436ef (target/arm: Fill in .opc for cmtst_op)
2/17 Checking commit a697173b715a (tcg: Assert fixed_reg is read-only)
WARNING: Block comments use a leading /* on a separate line
#102: FILE: tcg/tcg.c:3529:
+            /* temp value is modified, so the value kept in memory is

WARNING: Block comments use * on subsequent lines
#103: FILE: tcg/tcg.c:3530:
+            /* temp value is modified, so the value kept in memory is
+               potentially not the same */

WARNING: Block comments use a trailing */ on a separate line
#103: FILE: tcg/tcg.c:3530:
+               potentially not the same */

total: 0 errors, 3 warnings, 140 lines checked

Patch 2/17 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/17 Checking commit fb3eb5295593 (tcg: Return bool success from tcg_out_mov)
4/17 Checking commit 4673251646b6 (tcg: Support cross-class moves without 
instruction support)
WARNING: Block comments use a leading /* on a separate line
#23: FILE: tcg/tcg.c:3372:
+                /* Cross register class move not supported.

WARNING: Block comments use * on subsequent lines
#24: FILE: tcg/tcg.c:3373:
+                /* Cross register class move not supported.
+                   Store the source register into the destination slot

WARNING: Block comments use a trailing */ on a separate line
#25: FILE: tcg/tcg.c:3374:
+                   and leave the destination temp as TEMP_VAL_MEM.  */

WARNING: Block comments use a leading /* on a separate line
#43: FILE: tcg/tcg.c:3485:
+                /* Cross register class move not supported.  Sync the

WARNING: Block comments use * on subsequent lines
#44: FILE: tcg/tcg.c:3486:
+                /* Cross register class move not supported.  Sync the
+                   temp back to its slot and load from there.  */

WARNING: Block comments use a trailing */ on a separate line
#44: FILE: tcg/tcg.c:3486:
+                   temp back to its slot and load from there.  */

WARNING: Block comments use a leading /* on a separate line
#56: FILE: tcg/tcg.c:3648:
+                        /* Cross register class move not supported.  Sync the

WARNING: Block comments use * on subsequent lines
#57: FILE: tcg/tcg.c:3649:
+                        /* Cross register class move not supported.  Sync the
+                           temp back to its slot and load from there.  */

WARNING: Block comments use a trailing */ on a separate line
#57: FILE: tcg/tcg.c:3649:
+                           temp back to its slot and load from there.  */

total: 0 errors, 9 warnings, 43 lines checked

Patch 4/17 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/17 Checking commit 1e0bdeae9fbb (tcg: Allow add_vec, sub_vec, neg_vec, 
not_vec to be expanded)
6/17 Checking commit 74d1ac5eccdc (tcg: Promote tcg_out_{dup, dupi}_vec to 
backend interface)
7/17 Checking commit 829ebc1bb408 (tcg: Manually expand INDEX_op_dup_vec)
8/17 Checking commit 024ba0bb766a (tcg: Add tcg_out_dupm_vec to the backend 
interface)
9/17 Checking commit 7a06ac2a80c6 (tcg/i386: Implement tcg_out_dupm_vec)
10/17 Checking commit badd4b84af08 (tcg/aarch64: Implement tcg_out_dupm_vec)
11/17 Checking commit 65ff7b668b00 (tcg: Add INDEX_op_dup_mem_vec)
WARNING: Block comments use a leading /* on a separate line
#95: FILE: tcg/tcg-op-gvec.c:400:
+        /* Recall that ARM SVE allows vector sizes that are not a

total: 0 errors, 1 warnings, 178 lines checked

Patch 11/17 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/17 Checking commit f7cc7426cdc3 (tcg/ppc: Initial backend support for 
Altivec)
ERROR: spaces required around that '|' (ctx:VxV)
#189: FILE: tcg/ppc/tcg-target.inc.c:327:
+#define VX4(opc)  (OPCD(4)|(opc))
                           ^

WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#961: 
new file mode 100644

WARNING: Block comments use a leading /* on a separate line
#966: FILE: tcg/ppc/tcg-target.opc.h:1:
+/* Target-specific opcodes for host vector expansion.  These will be

WARNING: Block comments use * on subsequent lines
#967: FILE: tcg/ppc/tcg-target.opc.h:2:
+/* Target-specific opcodes for host vector expansion.  These will be
+   emitted by tcg_expand_vec_op.  For those familiar with GCC internals,

WARNING: Block comments use a trailing */ on a separate line
#968: FILE: tcg/ppc/tcg-target.opc.h:3:
+   consider these to be UNSPEC with names.  */

total: 1 errors, 4 warnings, 917 lines checked

Patch 12/17 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

13/17 Checking commit 3c5b8415c5f9 (tcg/ppc: Support vector shift by immediate)
14/17 Checking commit 4f74948f7a2c (tcg/ppc: Support vector multiply)
ERROR: code indent should never use tabs
#132: FILE: tcg/ppc/tcg-target.inc.c:3229:
+^Ibreak;$

total: 1 errors, 0 warnings, 185 lines checked

Patch 14/17 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/17 Checking commit 0e0e4d982853 (tcg/ppc: Update vector support to v2.06)
16/17 Checking commit d101220c5c0b (tcg/ppc: Update vector support to v2.07)
17/17 Checking commit b3f85d68046b (tcg/ppc: Update vector support to v3.00)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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