Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU

[Philippe Mathieu-Daudé]

Cc'ing Laurent for the linux-user FPU emulation part.

On 9/15/18 11:50 AM, Fredrik Noring wrote:
> The primary purpose of this change is to support programs compiled by
> GCC for the R5900 target and thereby run R5900 Linux distributions, for
> example Gentoo. In particular, this avoids issues with cross compilation.
> 
> This change has been tested with Gentoo compiled for R5900, including
> native compilation of several packages under QEMU.
> 
> Signed-off-by: Fredrik Noring <address@hidden>
> ---
>  target/mips/translate_init.inc.c | 47 
> ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/target/mips/translate_init.inc.c 
> b/target/mips/translate_init.inc.c
> index b3320b9dc7..71fd83de06 100644
> --- a/target/mips/translate_init.inc.c
> +++ b/target/mips/translate_init.inc.c
> @@ -410,6 +410,53 @@ const mips_def_t mips_defs[] =
>          .insn_flags = CPU_MIPS32R5 | ASE_MSA,
>          .mmu_type = MMU_TYPE_R4000,
>      },
> +    {
> +        .name = "R5900",
> +        .CP0_PRid = 0x00003800,
> +        /* No L2 cache, icache size 32k, dcache size 32k, uncached 
> coherency. */
> +        .CP0_Config0 = (0x3 << 9) | (0x3 << 6) | (0x2 << CP0C0_K0),
> +        .CP0_Status_rw_bitmask = 0xF4C79C1F,
> +#ifdef CONFIG_USER_ONLY
> +        /*
> +         * R5900 hardware traps to the Linux kernel for IEEE 754-1985 and 
> LL/SC
> +         * emulation. For user only, QEMU is the kernel, so we emulate the 
> traps
> +         * by simply emulating the instructions directly.
> +         *
> +         * Note: Config1 is only used internally, the R5900 has only Config0.
> +         */
> +        .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
> +        .CP0_LLAddr_rw_bitmask = 0xFFFFFFFF,
> +        .CP0_LLAddr_shift = 4,
> +        .CP1_fcr0 = (0x38 << FCR0_PRID) | (0x0 << FCR0_REV),
> +        .CP1_fcr31 = 0,
> +        .CP1_fcr31_rw_bitmask = 0x0183FFFF,
> +#else
> +        /*
> +         * The R5900 COP1 FPU implements single-precision floating-point
> +         * operations but is not entirely IEEE 754-1985 compatible. In
> +         * particular,
> +         *
> +         * - NaN (not a number) and plus/minus infinities are not supported;
> +         * - exception mechanisms are not fully supported;
> +         * - denormalized numbers are not supported;
> +         * - rounding towards nearest and plus/minus infinities are not 
> supported;
> +         * - computed results usually differs in the least significant bit;
> +         * - saturating instructions can differ more than the least 
> significant bit.
> +         *
> +         * Since only rounding towards zero is supported, the two least
> +         * significant bits of FCR31 are hardwired to 01.
> +         *
> +         * FPU emulation is disabled here until it is implemented.
> +         *
> +         * Note: Config1 is only used internally, the R5900 has only Config0.
> +         */
> +        .CP0_Config1 = (47 << CP0C1_MMU),
> +#endif /* !CONFIG_USER_ONLY */
> +        .SEGBITS = 32,
> +        .PABITS = 32,
> +        .insn_flags = CPU_R5900,
> +        .mmu_type = MMU_TYPE_R4000,
> +    },
>      {
>          /* A generic CPU supporting MIPS32 Release 6 ISA.
>             FIXME: Support IEEE 754-2008 FP.
>