www/philosophy free-hardware-designs.html

[Richard M. Stallman]

CVSROOT:        /web/www
Module name:    www
Changes by:     Richard M. Stallman <rms>       15/07/16 10:54:45

Modified files:
        philosophy     : free-hardware-designs.html 

Log message:
        Refer to the free tools for Lattice iCE40 FPGA.  Other related changes
        in nearby text.

CVSWeb URLs:
http://web.cvs.savannah.gnu.org/viewcvs/www/philosophy/free-hardware-designs.html?cvsroot=www&r1=1.6&r2=1.7

Patches:
Index: free-hardware-designs.html
===================================================================
RCS file: /web/www/www/philosophy/free-hardware-designs.html,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -b -r1.6 -r1.7
--- free-hardware-designs.html  2 Jun 2015 02:38:40 -0000       1.6
+++ free-hardware-designs.html  16 Jul 2015 10:54:44 -0000      1.7
@@ -135,18 +135,17 @@
 method for making digital devices that are free at the circuit level.
 However, to make FPGAs usable in the free world, we need free
 development tools for them.  The obstacle is that the format of the
-gate pattern file that gets loaded into the FPGA is secret.  Until
-recently there was <em>no</em> model of FPGA for which those files
-could be produced without nonfree (proprietary) tools.</p>
-
-<p>Thanks to a reverse-engineering effort, it is now possible to
-compile C programs and run them on the Xilinx Spartan 6 LX9 FPGA.  The
-tools do not yet support HDL (hardware definition language) code,
-though, so this does not offer a usable substitute for real digital
-chips.  Meanwhile, that model of FPGA is starting to get old.  These
-tools constitute a tremendous advance over the situation a few years
-ago, but there's a long way to go before FPGAs are fully usable in
-freedom.</p>
+gate pattern file that gets loaded into the FPGA is secret.  For many
+years there was no model of FPGA for which those files could be
+produced without nonfree (proprietary) tools.</p>
+
+<p>As of 2015, free software tools are available for
+<a href="http://www.clifford.at/icestorm/";>programming the Lattice
+iCE40</a>, a common model of FPGA, from input written in a hardware
+definition language (HDL).  It is also possible to compile C programs
+and run them on the Xilinx Spartan 6 LX9 FPGA with free tools, but
+those do not support HDL input.  We recommend that you reject other
+FPGA models until they too are supported by free tools.</p>
 
 <p>As for the HDL code itself, it can act as software (when it is run
 on an emulator or loaded into an FPGA) or as a hardware design (when
@@ -503,7 +502,7 @@
 
 <p class="unprintable">Updated:
 <!-- timestamp start -->
-$Date: 2015/06/02 02:38:40 $
+$Date: 2015/07/16 10:54:44 $
 <!-- timestamp end -->
 </p>
 </div>