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[Qemu-ppc] [PULL 04/29] hw/ppc/spapr: Move code related to "ibm, pa-feat
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 04/29] hw/ppc/spapr: Move code related to "ibm, pa-features" to a separate function |
Date: |
Thu, 6 Oct 2016 23:02:50 +1100 |
From: Thomas Huth <address@hidden>
The function spapr_populate_cpu_dt() has become quite big
already, and since we likely have to extend the pa-features
property for every new processor generation, it is nicer
if we put the related code into a separate function.
Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 66 ++++++++++++++++++++++++++++++++--------------------------
1 file changed, 36 insertions(+), 30 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 420ad1b..8048f92 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -546,6 +546,41 @@ static int spapr_populate_memory(sPAPRMachineState *spapr,
void *fdt)
return 0;
}
+/* Populate the "ibm,pa-features" property */
+static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)
+{
+ uint8_t pa_features_206[] = { 6, 0,
+ 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
+ uint8_t pa_features_207[] = { 24, 0,
+ 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
+ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
+ uint8_t *pa_features;
+ size_t pa_size;
+
+ if (env->mmu_model == POWERPC_MMU_2_06) {
+ pa_features = pa_features_206;
+ pa_size = sizeof(pa_features_206);
+ } else { /* env->mmu_model == POWERPC_MMU_2_07 */
+ pa_features = pa_features_207;
+ pa_size = sizeof(pa_features_207);
+ }
+
+ if (env->ci_large_pages) {
+ /*
+ * Note: we keep CI large pages off by default because a 64K capable
+ * guest provisioned with large pages might otherwise try to map a qemu
+ * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
+ * even if that qemu runs on a 4k host.
+ * We dd this bit back here if we are confident this is not an issue
+ */
+ pa_features[3] |= 0x20;
+ }
+
+ _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
+}
+
static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
sPAPRMachineState *spapr)
{
@@ -573,24 +608,6 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt,
int offset,
_FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index)));
}
- /* Note: we keep CI large pages off for now because a 64K capable guest
- * provisioned with large pages might otherwise try to map a qemu
- * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
- * even if that qemu runs on a 4k host.
- *
- * We can later add this bit back when we are confident this is not
- * an issue (!HV KVM or 64K host)
- */
- uint8_t pa_features_206[] = { 6, 0,
- 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
- uint8_t pa_features_207[] = { 24, 0,
- 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
- 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
- 0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
- uint8_t *pa_features;
- size_t pa_size;
-
_FDT((fdt_setprop_cell(fdt, offset, "reg", index)));
_FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));
@@ -657,18 +674,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt,
int offset,
page_sizes_prop, page_sizes_prop_size)));
}
- /* Do the ibm,pa-features property, adjust it for ci-large-pages */
- if (env->mmu_model == POWERPC_MMU_2_06) {
- pa_features = pa_features_206;
- pa_size = sizeof(pa_features_206);
- } else /* env->mmu_model == POWERPC_MMU_2_07 */ {
- pa_features = pa_features_207;
- pa_size = sizeof(pa_features_207);
- }
- if (env->ci_large_pages) {
- pa_features[3] |= 0x20;
- }
- _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
+ spapr_populate_pa_features(env, fdt, offset);
_FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
cs->cpu_index / vcpus_per_socket)));
--
2.7.4
- [Qemu-ppc] [PULL 00/29] ppc-for-2.8 queue 20161006, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 02/29] tests: Test IPv6 and ppc64 in the PXE tester, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 07/29] target-ppc: Implement mfvsrld instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 04/29] hw/ppc/spapr: Move code related to "ibm, pa-features" to a separate function,
David Gibson <=
- [Qemu-ppc] [PULL 08/29] target-ppc: Implement mtvsrdd instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 15/29] target-ppc: fix invalid mask - cmpl, bctar, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 10/29] target-ppc: improve stxvw4x implementation, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 03/29] pseries: Add 2.8 machine type, set up compatibility macros, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 13/29] target-ppc: add lxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 14/29] target-ppc: add stxvb16x instruction, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 20/29] target-ppc/kvm: Add a wrapper function to check for KVM-PR, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 16/29] target-ppc: add vector compare not equal instructions, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 05/29] hw/ppc/spapr: Fix the selection of the processor features, David Gibson, 2016/10/06
- [Qemu-ppc] [PULL 01/29] spapr_vscsi: fix build error introduced by f19661c8, David Gibson, 2016/10/06