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Re: [Qemu-ppc] [PATCH 4/4] spapr: Add support for time base offset migra

From: Alexander Graf
Subject: Re: [Qemu-ppc] [PATCH 4/4] spapr: Add support for time base offset migration
Date: Mon, 14 Apr 2014 09:22:23 +0200
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.9; rv:24.0) Gecko/20100101 Thunderbird/24.4.0

On 14.04.14 09:12, Alexey Kardashevskiy wrote:
On 04/14/2014 04:37 PM, Alexander Graf wrote:
On 12.04.14 23:44, Benjamin Herrenschmidt wrote:
On Sat, 2014-04-12 at 16:31 +0200, Alexander Graf wrote:
Don't we generate PHBs on the fly? How exactly is this going to help
with the problem at hand?
We can still assign the interrupts as a fixed function of the PHB
Yes, but we create those depending on the order with which -device gets
called IIUC. That's really what the underlying issue is. If we had 500
prepopulated PHBs that PCI devices get assigned to we wouldn't have the
problem (but different ones thanks to massive waste of memory and other

So we either have to create some way to make interrupt numbering a function
of something very simple we plug the PHB into, like a virtual pseries slot
number which we multiply by x to get an irq number range. Or we'd have to
manually link up PHB IRQ lines to XICS IRQ lines on the command line.

Our additional PHBs require @index property which is used to calculate base
MMIO and IO ranges. That we could use for LSI/MSI too.

Works for me :)


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