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[PULL 08/17] target/i386: Add support for AVX-VNNI-INT8 in CPUID enumera
From: |
Paolo Bonzini |
Subject: |
[PULL 08/17] target/i386: Add support for AVX-VNNI-INT8 in CPUID enumeration |
Date: |
Sat, 29 Apr 2023 14:16:27 +0200 |
From: Jiaxi Chen <jiaxi.chen@linux.intel.com>
AVX-VNNI-INT8 is a new set of instructions in the latest Intel platform
Sierra Forest, aims for the platform to have superior AI capabilities.
This instruction multiplies the individual bytes of two unsigned or
unsigned source operands, then adds and accumulates the results into the
destination dword element size operand.
The bit definition:
CPUID.(EAX=7,ECX=1):EDX[bit 4]
AVX-VNNI-INT8 is on a new feature bits leaf. Add a CPUID feature word
FEAT_7_1_EDX for this leaf.
Add CPUID definition for AVX-VNNI-INT8.
Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com>
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20230303065913.1246327-5-tao1.su@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 22 +++++++++++++++++++++-
target/i386/cpu.h | 4 ++++
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 8eb2ee5045d7..abceab2b6992 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -667,6 +667,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
#define TCG_7_0_EDX_FEATURES CPUID_7_0_EDX_FSRM
#define TCG_7_1_EAX_FEATURES (CPUID_7_1_EAX_FZRM | CPUID_7_1_EAX_FSRS | \
CPUID_7_1_EAX_FSRC)
+#define TCG_7_1_EDX_FEATURES 0
#define TCG_APM_FEATURES 0
#define TCG_6_EAX_FEATURES CPUID_6_EAX_ARAT
#define TCG_XSAVE_FEATURES (CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1)
@@ -890,6 +891,25 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.tcg_features = TCG_7_1_EAX_FEATURES,
},
+ [FEAT_7_1_EDX] = {
+ .type = CPUID_FEATURE_WORD,
+ .feat_names = {
+ NULL, NULL, NULL, NULL,
+ "avx-vnni-int8", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ },
+ .cpuid = {
+ .eax = 7,
+ .needs_ecx = true, .ecx = 1,
+ .reg = R_EDX,
+ },
+ .tcg_features = TCG_7_1_EDX_FEATURES,
+ },
[FEAT_8000_0007_EDX] = {
.type = CPUID_FEATURE_WORD,
.feat_names = {
@@ -5534,9 +5554,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
}
} else if (count == 1) {
*eax = env->features[FEAT_7_1_EAX];
+ *edx = env->features[FEAT_7_1_EDX];
*ebx = 0;
*ecx = 0;
- *edx = 0;
} else {
*eax = 0;
*ebx = 0;
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 1f72d11e0ccc..0b25d180753b 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -626,6 +626,7 @@ typedef enum FeatureWord {
FEAT_SGX_12_1_EAX, /* CPUID[EAX=0x12,ECX=1].EAX (SGX ATTRIBUTES[31:0]) */
FEAT_XSAVE_XSS_LO, /* CPUID[EAX=0xd,ECX=1].ECX */
FEAT_XSAVE_XSS_HI, /* CPUID[EAX=0xd,ECX=1].EDX */
+ FEAT_7_1_EDX, /* CPUID[EAX=7,ECX=1].EDX */
FEATURE_WORDS,
} FeatureWord;
@@ -920,6 +921,9 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
/* Support for VPMADD52[H,L]UQ */
#define CPUID_7_1_EAX_AVX_IFMA (1U << 23)
+/* Support for VPDPB[SU,UU,SS]D[,S] */
+#define CPUID_7_1_EDX_AVX_VNNI_INT8 (1U << 4)
+
/* XFD Extend Feature Disabled */
#define CPUID_D_1_EAX_XFD (1U << 4)
--
2.40.0
- [PULL 00/17] Misc patches for 2023-04-29, Paolo Bonzini, 2023/04/29
- [PULL 01/17] qapi, i386/sev: Change the reduced-phys-bits value from 5 to 1, Paolo Bonzini, 2023/04/29
- [PULL 02/17] qemu-options.hx: Update the reduced-phys-bits documentation, Paolo Bonzini, 2023/04/29
- [PULL 03/17] i386/sev: Update checks and information related to reduced-phys-bits, Paolo Bonzini, 2023/04/29
- [PULL 04/17] i386/cpu: Update how the EBX register of CPUID 0x8000001F is set, Paolo Bonzini, 2023/04/29
- [PULL 05/17] target/i386: Add support for CMPCCXADD in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 06/17] target/i386: Add support for AMX-FP16 in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 07/17] target/i386: Add support for AVX-IFMA in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 08/17] target/i386: Add support for AVX-VNNI-INT8 in CPUID enumeration,
Paolo Bonzini <=
- [PULL 10/17] target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 09/17] target/i386: Add support for AVX-NE-CONVERT in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 12/17] update-linux-headers.sh: Add missing kernel headers., Paolo Bonzini, 2023/04/29
- [PULL 13/17] Update linux headers to v6.3rc5, Paolo Bonzini, 2023/04/29
- [PULL 14/17] tests: vhost-user-test: release mutex on protocol violation, Paolo Bonzini, 2023/04/29
- [PULL 16/17] async: Suppress GCC13 false positive in aio_bh_poll(), Paolo Bonzini, 2023/04/29
- [PULL 11/17] Fix libvhost-user.c compilation., Paolo Bonzini, 2023/04/29
- [PULL 15/17] target/hexagon: fix = vs. == mishap, Paolo Bonzini, 2023/04/29
- [PULL 17/17] cpus-common: stop using mb_set/mb_read, Paolo Bonzini, 2023/04/29