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[PULL 03/17] i386/sev: Update checks and information related to reduced-
From: |
Paolo Bonzini |
Subject: |
[PULL 03/17] i386/sev: Update checks and information related to reduced-phys-bits |
Date: |
Sat, 29 Apr 2023 14:16:22 +0200 |
From: Tom Lendacky <thomas.lendacky@amd.com>
The value of the reduced-phys-bits parameter is propogated to the CPUID
information exposed to the guest. Update the current validation check to
account for the size of the CPUID field (6-bits), ensuring the value is
in the range of 1 to 63.
Maintain backward compatibility, to an extent, by allowing a value greater
than 1 (so that the previously documented value of 5 still works), but not
allowing anything over 63.
Fixes: d8575c6c02 ("sev/i386: add command to initialize the memory encryption
context")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id:
<cca5341a95ac73f904e6300f10b04f9c62e4e8ff.1664550870.git.thomas.lendacky@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/sev.c | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 859e06f6ad77..fe2144c0388b 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -932,15 +932,26 @@ int sev_kvm_init(ConfidentialGuestSupport *cgs, Error
**errp)
host_cpuid(0x8000001F, 0, NULL, &ebx, NULL, NULL);
host_cbitpos = ebx & 0x3f;
+ /*
+ * The cbitpos value will be placed in bit positions 5:0 of the EBX
+ * register of CPUID 0x8000001F. No need to verify the range as the
+ * comparison against the host value accomplishes that.
+ */
if (host_cbitpos != sev->cbitpos) {
error_setg(errp, "%s: cbitpos check failed, host '%d' requested '%d'",
__func__, host_cbitpos, sev->cbitpos);
goto err;
}
- if (sev->reduced_phys_bits < 1) {
- error_setg(errp, "%s: reduced_phys_bits check failed, it should be
>=1,"
- " requested '%d'", __func__, sev->reduced_phys_bits);
+ /*
+ * The reduced-phys-bits value will be placed in bit positions 11:6 of
+ * the EBX register of CPUID 0x8000001F, so verify the supplied value
+ * is in the range of 1 to 63.
+ */
+ if (sev->reduced_phys_bits < 1 || sev->reduced_phys_bits > 63) {
+ error_setg(errp, "%s: reduced_phys_bits check failed,"
+ " it should be in the range of 1 to 63, requested '%d'",
+ __func__, sev->reduced_phys_bits);
goto err;
}
--
2.40.0
- [PULL 00/17] Misc patches for 2023-04-29, Paolo Bonzini, 2023/04/29
- [PULL 01/17] qapi, i386/sev: Change the reduced-phys-bits value from 5 to 1, Paolo Bonzini, 2023/04/29
- [PULL 02/17] qemu-options.hx: Update the reduced-phys-bits documentation, Paolo Bonzini, 2023/04/29
- [PULL 03/17] i386/sev: Update checks and information related to reduced-phys-bits,
Paolo Bonzini <=
- [PULL 04/17] i386/cpu: Update how the EBX register of CPUID 0x8000001F is set, Paolo Bonzini, 2023/04/29
- [PULL 05/17] target/i386: Add support for CMPCCXADD in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 06/17] target/i386: Add support for AMX-FP16 in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 07/17] target/i386: Add support for AVX-IFMA in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 08/17] target/i386: Add support for AVX-VNNI-INT8 in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 10/17] target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 09/17] target/i386: Add support for AVX-NE-CONVERT in CPUID enumeration, Paolo Bonzini, 2023/04/29
- [PULL 12/17] update-linux-headers.sh: Add missing kernel headers., Paolo Bonzini, 2023/04/29
- [PULL 13/17] Update linux headers to v6.3rc5, Paolo Bonzini, 2023/04/29
- [PULL 14/17] tests: vhost-user-test: release mutex on protocol violation, Paolo Bonzini, 2023/04/29