[PATCH 0/6] target/riscv: Fix PMP related problem

[Weiwei Li]

This patchset tries to fix the PMP bypass problem issue 
https://gitlab.com/qemu-project/qemu/-/issues/1542

The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-pmp-fix

Weiwei Li (6):
  target/riscv: Update pmp_get_tlb_size()
  target/riscv: Move pmp_get_tlb_size apart from
    get_physical_address_pmp
  target/riscv: flush tlb when pmpaddr is updated
  target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes
  target/riscv: flush tb when PMP entry changes
  accel/tcg: Remain TLB_INVALID_MASK in the address when TLB is
    re-filled

 accel/tcg/cputlb.c        |  7 -----
 target/riscv/cpu_helper.c | 19 ++++---------
 target/riscv/pmp.c        | 60 ++++++++++++++++++++++++++-------------
 target/riscv/pmp.h        |  3 +-
 4 files changed, 47 insertions(+), 42 deletions(-)

-- 
2.25.1