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[PATCH 5/6] target/riscv: flush tb when PMP entry changes
From: |
Weiwei Li |
Subject: |
[PATCH 5/6] target/riscv: flush tb when PMP entry changes |
Date: |
Thu, 13 Apr 2023 17:01:21 +0800 |
The translation block may also be affected when PMP entry changes.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
target/riscv/pmp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index aced23c4d5..c2db52361f 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -25,6 +25,7 @@
#include "cpu.h"
#include "trace.h"
#include "exec/exec-all.h"
+#include "exec/tb-flush.h"
static bool pmp_write_cfg(CPURISCVState *env, uint32_t addr_index,
uint8_t val);
@@ -492,6 +493,7 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t
reg_index,
/* If PMP permission of any addr has been changed, flush TLB pages. */
if (modified) {
tlb_flush(env_cpu(env));
+ tb_flush(env_cpu(env));
}
}
@@ -545,6 +547,7 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t
addr_index,
env->pmp_state.pmp[addr_index].addr_reg = val;
pmp_update_rule(env, addr_index);
tlb_flush(env_cpu(env));
+ tb_flush(env_cpu(env));
}
} else {
qemu_log_mask(LOG_GUEST_ERROR,
--
2.25.1
- Re: [PATCH 1/6] target/riscv: Update pmp_get_tlb_size(), (continued)
[PATCH 6/6] accel/tcg: Remain TLB_INVALID_MASK in the address when TLB is re-filled, Weiwei Li, 2023/04/13
[PATCH 5/6] target/riscv: flush tb when PMP entry changes,
Weiwei Li <=
Re: [PATCH 0/6] target/riscv: Fix PMP related problem, LIU Zhiwei, 2023/04/17