Re: [PATCH 3/6] target/riscv: flush tlb when pmpaddr is updated

[Weiwei Li]

On 2023/4/18 15:11, LIU Zhiwei wrote:
> On 2023/4/13 17:01, Weiwei Li wrote:
> > TLB should be flushed not only for pmpcfg csr changes, but also for
> > pmpaddr csr changes.
> >
> > Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> > Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> > ---
> >   target/riscv/pmp.c | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> > index 4f9389e73c..6d4813806b 100644
> > --- a/target/riscv/pmp.c
> > +++ b/target/riscv/pmp.c
> > @@ -537,6 +537,7 @@ void pmpaddr_csr_write(CPURISCVState *env, 
> > uint32_t addr_index,
> >           if (!pmp_is_locked(env, addr_index)) {
> >               env->pmp_state.pmp[addr_index].addr_reg = val;
> >               pmp_update_rule(env, addr_index);
> > +            tlb_flush(env_cpu(env));
>
> Can we always flush tlb in pmp_update_rule?

I considered this way, However  this may lead to tlb being flushed 
several times when we update pmpcfg csrs.

Regards,

Weiwei Li

> Zhiwei
>
> >           } else {
> >               qemu_log_mask(LOG_GUEST_ERROR,
> >                             "ignoring pmpaddr write - locked\n");