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[PULL v2 73/91] target/arm: Improve trans_BFCI
From: |
Richard Henderson |
Subject: |
[PULL v2 73/91] target/arm: Improve trans_BFCI |
Date: |
Thu, 9 Mar 2023 12:05:32 -0800 |
Reorg temporary usage so that we can use tcg_constant_i32.
tcg_gen_deposit_i32 already has a width == 32 special case,
so remove the check here.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index b70b628000..4451aea09c 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -7261,8 +7261,8 @@ static bool trans_UBFX(DisasContext *s, arg_UBFX *a)
static bool trans_BFCI(DisasContext *s, arg_BFCI *a)
{
- TCGv_i32 tmp;
int msb = a->msb, lsb = a->lsb;
+ TCGv_i32 t_in, t_rd;
int width;
if (!ENABLE_ARCH_6T2) {
@@ -7277,16 +7277,13 @@ static bool trans_BFCI(DisasContext *s, arg_BFCI *a)
width = msb + 1 - lsb;
if (a->rn == 15) {
/* BFC */
- tmp = tcg_const_i32(0);
+ t_in = tcg_constant_i32(0);
} else {
/* BFI */
- tmp = load_reg(s, a->rn);
+ t_in = load_reg(s, a->rn);
}
- if (width != 32) {
- TCGv_i32 tmp2 = load_reg(s, a->rd);
- tcg_gen_deposit_i32(tmp, tmp2, tmp, lsb, width);
- }
- store_reg(s, a->rd, tmp);
+ t_rd = load_reg(s, a->rd);
+ tcg_gen_deposit_i32(t_rd, t_rd, t_in, lsb, width);
return true;
}
--
2.34.1
- [PULL v2 69/91] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf, (continued)
- [PULL v2 69/91] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 70/91] target/arm: Improve arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 74/91] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}, Richard Henderson, 2023/03/09
- [PULL v2 78/91] target/arm: Avoid tcg_const_ptr in handle_rev, Richard Henderson, 2023/03/09
- [PULL v2 71/91] target/arm: Consistently use ARMFPRounding during translation, Richard Henderson, 2023/03/09
- [PULL v2 72/91] target/arm: Create gen_set_rmode, gen_restore_rmode, Richard Henderson, 2023/03/09
- [PULL v2 79/91] target/m68k: Use tcg_constant_i32 in gen_ea_mode, Richard Henderson, 2023/03/09
- [PULL v2 77/91] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn, Richard Henderson, 2023/03/09
- [PULL v2 75/91] target/arm: Avoid tcg_const_* in translate-mve.c, Richard Henderson, 2023/03/09
- [PULL v2 76/91] target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn, Richard Henderson, 2023/03/09
- [PULL v2 73/91] target/arm: Improve trans_BFCI,
Richard Henderson <=
- [PULL v2 85/91] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc, Richard Henderson, 2023/03/09
- [PULL v2 87/91] target/ppc: Fix gen_tlbsx_booke206, Richard Henderson, 2023/03/09
- [PULL v2 91/91] tcg: Drop tcg_const_*, Richard Henderson, 2023/03/09
- [PULL v2 90/91] tcg: Drop tcg_const_*_vec, Richard Henderson, 2023/03/09
- [PULL v2 89/91] target/tricore: Use min/max for saturate, Richard Henderson, 2023/03/09
- [PULL v2 88/91] target/ppc: Avoid tcg_const_* in translate.c, Richard Henderson, 2023/03/09
- [PULL v2 86/91] target/ppc: Rewrite trans_ADDG6S, Richard Henderson, 2023/03/09
- [PULL v2 80/91] target/ppc: Avoid tcg_const_i64 in do_vcntmb, Richard Henderson, 2023/03/09
- [PULL v2 81/91] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc, Richard Henderson, 2023/03/09
- [PULL v2 83/91] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc, Richard Henderson, 2023/03/09