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[PULL v2 53/91] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad
From: |
Richard Henderson |
Subject: |
[PULL v2 53/91] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad |
Date: |
Thu, 9 Mar 2023 12:05:12 -0800 |
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/translate/vmx-impl.c.inc | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index ee656d6a44..7af6d7217d 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -906,7 +906,6 @@ static bool do_vector_shift_quad(DisasContext *ctx, arg_VX
*a, bool right,
hi = tcg_temp_new_i64();
lo = tcg_temp_new_i64();
t0 = tcg_temp_new_i64();
- t1 = tcg_const_i64(0);
get_avr64(lo, a->vra, false);
get_avr64(hi, a->vra, true);
@@ -917,7 +916,10 @@ static bool do_vector_shift_quad(DisasContext *ctx, arg_VX
*a, bool right,
if (right) {
tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, hi, lo);
if (alg) {
+ t1 = tcg_temp_new_i64();
tcg_gen_sari_i64(t1, lo, 63);
+ } else {
+ t1 = zero;
}
tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, t1, hi);
} else {
--
2.34.1
- [PULL v2 46/91] target/m68k: Avoid tcg_const_i32 in bfop_reg, (continued)
- [PULL v2 46/91] target/m68k: Avoid tcg_const_i32 in bfop_reg, Richard Henderson, 2023/03/09
- [PULL v2 44/91] target/i386: Avoid use of tcg_const_* throughout, Richard Henderson, 2023/03/09
- [PULL v2 48/91] target/mips: Split out gen_lxl, Richard Henderson, 2023/03/09
- [PULL v2 47/91] target/m68k: Avoid tcg_const_* throughout, Richard Henderson, 2023/03/09
- [PULL v2 49/91] target/mips: Split out gen_lxr, Richard Henderson, 2023/03/09
- [PULL v2 52/91] target/ppc: Split out gen_vx_vmul10, Richard Henderson, 2023/03/09
- [PULL v2 50/91] target/mips: Avoid tcg_const_tl in gen_r6_ld, Richard Henderson, 2023/03/09
- [PULL v2 54/91] target/rx: Use tcg_gen_abs_i32, Richard Henderson, 2023/03/09
- [PULL v2 55/91] target/rx: Use cpu_psw_z as temp in flags computation, Richard Henderson, 2023/03/09
- [PULL v2 51/91] target/mips: Avoid tcg_const_* throughout, Richard Henderson, 2023/03/09
- [PULL v2 53/91] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad,
Richard Henderson <=
- [PULL v2 56/91] target/rx: Avoid tcg_const_i32 when new temp needed, Richard Henderson, 2023/03/09
- [PULL v2 57/91] target/rx: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 58/91] target/s390x: Avoid tcg_const_i64, Richard Henderson, 2023/03/09
- [PULL v2 60/91] target/sh4: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 59/91] target/sh4: Avoid tcg_const_i32 for TAS.B, Richard Henderson, 2023/03/09
- [PULL v2 61/91] tcg/sparc: Avoid tcg_const_tl in gen_edge, Richard Henderson, 2023/03/09
- [PULL v2 62/91] target/tricore: Split t_n as constant from temp as variable, Richard Henderson, 2023/03/09
- [PULL v2 63/91] target/tricore: Rename t_off10 and use tcg_constant_i32, Richard Henderson, 2023/03/09
- [PULL v2 65/91] target/tricore: Drop some temp initialization, Richard Henderson, 2023/03/09
- [PULL v2 68/91] target/arm: Use rmode >= 0 for need_rmode, Richard Henderson, 2023/03/09