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[PULL v2 61/91] tcg/sparc: Avoid tcg_const_tl in gen_edge
From: |
Richard Henderson |
Subject: |
[PULL v2 61/91] tcg/sparc: Avoid tcg_const_tl in gen_edge |
Date: |
Thu, 9 Mar 2023 12:05:20 -0800 |
Push tcg_constant_tl into the shift argument directly.
Since t1 no longer exists as a temp, replace with lo1,
whose last use was just above.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 5ee293326c..137bdc5159 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2838,7 +2838,7 @@ static inline void gen_load_trap_state_at_tl(TCGv_ptr
r_tsptr, TCGv_env cpu_env)
static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2,
int width, bool cc, bool left)
{
- TCGv lo1, lo2, t1, t2;
+ TCGv lo1, lo2;
uint64_t amask, tabl, tabr;
int shift, imask, omask;
@@ -2905,10 +2905,8 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv
s1, TCGv s2,
tcg_gen_shli_tl(lo1, lo1, shift);
tcg_gen_shli_tl(lo2, lo2, shift);
- t1 = tcg_const_tl(tabl);
- t2 = tcg_const_tl(tabr);
- tcg_gen_shr_tl(lo1, t1, lo1);
- tcg_gen_shr_tl(lo2, t2, lo2);
+ tcg_gen_shr_tl(lo1, tcg_constant_tl(tabl), lo1);
+ tcg_gen_shr_tl(lo2, tcg_constant_tl(tabr), lo2);
tcg_gen_andi_tl(dst, lo1, omask);
tcg_gen_andi_tl(lo2, lo2, omask);
@@ -2927,9 +2925,9 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1,
TCGv s2,
lo2 |= -(s1 == s2)
dst &= lo2
*/
- tcg_gen_setcond_tl(TCG_COND_EQ, t1, s1, s2);
- tcg_gen_neg_tl(t1, t1);
- tcg_gen_or_tl(lo2, lo2, t1);
+ tcg_gen_setcond_tl(TCG_COND_EQ, lo1, s1, s2);
+ tcg_gen_neg_tl(lo1, lo1);
+ tcg_gen_or_tl(lo2, lo2, lo1);
tcg_gen_and_tl(dst, dst, lo2);
}
--
2.34.1
- [PULL v2 50/91] target/mips: Avoid tcg_const_tl in gen_r6_ld, (continued)
- [PULL v2 50/91] target/mips: Avoid tcg_const_tl in gen_r6_ld, Richard Henderson, 2023/03/09
- [PULL v2 54/91] target/rx: Use tcg_gen_abs_i32, Richard Henderson, 2023/03/09
- [PULL v2 55/91] target/rx: Use cpu_psw_z as temp in flags computation, Richard Henderson, 2023/03/09
- [PULL v2 51/91] target/mips: Avoid tcg_const_* throughout, Richard Henderson, 2023/03/09
- [PULL v2 53/91] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad, Richard Henderson, 2023/03/09
- [PULL v2 56/91] target/rx: Avoid tcg_const_i32 when new temp needed, Richard Henderson, 2023/03/09
- [PULL v2 57/91] target/rx: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 58/91] target/s390x: Avoid tcg_const_i64, Richard Henderson, 2023/03/09
- [PULL v2 60/91] target/sh4: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 59/91] target/sh4: Avoid tcg_const_i32 for TAS.B, Richard Henderson, 2023/03/09
- [PULL v2 61/91] tcg/sparc: Avoid tcg_const_tl in gen_edge,
Richard Henderson <=
- [PULL v2 62/91] target/tricore: Split t_n as constant from temp as variable, Richard Henderson, 2023/03/09
- [PULL v2 63/91] target/tricore: Rename t_off10 and use tcg_constant_i32, Richard Henderson, 2023/03/09
- [PULL v2 65/91] target/tricore: Drop some temp initialization, Richard Henderson, 2023/03/09
- [PULL v2 68/91] target/arm: Use rmode >= 0 for need_rmode, Richard Henderson, 2023/03/09
- [PULL v2 64/91] target/tricore: Use setcondi instead of explicit allocation, Richard Henderson, 2023/03/09
- [PULL v2 67/91] tcg: Replace tcg_const_i64 in tcg-op.c, Richard Henderson, 2023/03/09
- [PULL v2 66/91] target/tricore: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 69/91] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 70/91] target/arm: Improve arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 74/91] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}, Richard Henderson, 2023/03/09