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[NOTFORMERGE PATCH v2 20/21] target/arm: Enable RME for -cpu max
From: |
Richard Henderson |
Subject: |
[NOTFORMERGE PATCH v2 20/21] target/arm: Enable RME for -cpu max |
Date: |
Mon, 20 Feb 2023 13:26:25 -1000 |
Add a cpu property to set GPCCR_EL3.L0GPTSZ, for testing
various possible configurations.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu64.c | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 4066950da1..70c173ee3d 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -672,6 +672,40 @@ void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp)
cpu->isar.id_aa64mmfr0 = t;
}
+static void cpu_max_set_l0gptsz(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ uint32_t value;
+
+ if (!visit_type_uint32(v, name, &value, errp)) {
+ return;
+ }
+
+ /* Encode the value for the GPCCR_EL3 field. */
+ switch (value) {
+ case 30:
+ case 34:
+ case 36:
+ case 39:
+ cpu->reset_l0gptsz = value - 30;
+ break;
+ default:
+ error_setg(errp, "invalid value for l0gptsz");
+ error_append_hint(errp, "valid values are 30, 34, 36, 39\n");
+ break;
+ }
+}
+
+static void cpu_max_get_l0gptsz(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ uint32_t value = cpu->reset_l0gptsz + 30;
+
+ visit_type_uint32(v, name, &value, errp);
+}
+
static void aarch64_a57_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
@@ -1200,6 +1234,7 @@ static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1);
t = FIELD_DP64(t, ID_AA64PFR0, SEL2, 1); /* FEAT_SEL2 */
t = FIELD_DP64(t, ID_AA64PFR0, DIT, 1); /* FEAT_DIT */
+ t = FIELD_DP64(t, ID_AA64PFR0, RME, 1); /* FEAT_RME */
t = FIELD_DP64(t, ID_AA64PFR0, CSV2, 2); /* FEAT_CSV2_2 */
t = FIELD_DP64(t, ID_AA64PFR0, CSV3, 1); /* FEAT_CSV3 */
cpu->isar.id_aa64pfr0 = t;
@@ -1301,6 +1336,8 @@ static void aarch64_max_initfn(Object *obj)
object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
cpu_max_set_sve_max_vq, NULL, NULL);
qdev_property_add_static(DEVICE(obj), &arm_cpu_lpa2_property);
+ object_property_add(obj, "l0gptsz", "uint32", cpu_max_get_l0gptsz,
+ cpu_max_set_l0gptsz, NULL, NULL);
}
static const ARMCPUInfo aarch64_cpus[] = {
--
2.34.1
- [PATCH v2 09/21] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root}, (continued)
- [PATCH v2 09/21] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root}, Richard Henderson, 2023/02/20
- [PATCH v2 10/21] target/arm: Pipe ARMSecuritySpace through ptw.c, Richard Henderson, 2023/02/20
- [PATCH v2 11/21] target/arm: NSTable is RES0 for the RME EL3 regime, Richard Henderson, 2023/02/20
- [PATCH v2 12/21] target/arm: Handle Block and Page bits for security space, Richard Henderson, 2023/02/20
- [PATCH v2 13/21] target/arm: Handle no-execute for Realm and Root regimes, Richard Henderson, 2023/02/20
- [PATCH v2 14/21] target/arm: Use get_phys_addr_with_struct in S1_ptw_translate, Richard Henderson, 2023/02/20
- [PATCH v2 15/21] target/arm: Move s1_is_el0 into S1Translate, Richard Henderson, 2023/02/20
- [PATCH v2 19/21] target/arm: Implement the granule protection check, Richard Henderson, 2023/02/20
- [PATCH v2 18/21] target/arm: Implement GPC exceptions, Richard Henderson, 2023/02/20
- [PATCH v2 16/21] target/arm: Use get_phys_addr_with_struct for stage2, Richard Henderson, 2023/02/20
- [NOTFORMERGE PATCH v2 20/21] target/arm: Enable RME for -cpu max,
Richard Henderson <=
- [PATCH v2 17/21] target/arm: Add GPC syndrome, Richard Henderson, 2023/02/20
- [NOTFORMERGE PATCH v2 21/21] hw/arm/virt: Add some memory for Realm Management Monitor, Richard Henderson, 2023/02/20