Re: [PATCH 06/14] target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml

[Fabiano Rosas]

Richard Henderson <richard.henderson@linaro.org> writes:

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/gdbstub64.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
> index 8d174ff6e0..02a0256c5c 100644
> --- a/target/arm/gdbstub64.c
> +++ b/target/arm/gdbstub64.c
> @@ -283,6 +283,7 @@ int arm_gen_dynamic_svereg_xml(CPUState *cs, int 
> orig_base_reg)
>      GString *s = g_string_new(NULL);
>      DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml;
>      int reg_width = cpu->sve_max_vq * 128;
> +    int pred_width = cpu->sve_max_vq * 16;
>      int base_reg = orig_base_reg;
>      int i;
>  
> @@ -319,14 +320,14 @@ int arm_gen_dynamic_svereg_xml(CPUState *cs, int 
> orig_base_reg)
>          g_string_append_printf(s,
>                                 "<reg name=\"p%d\" bitsize=\"%d\""
>                                 " regnum=\"%d\" type=\"svep\"/>",
> -                               i, cpu->sve_max_vq * 16, base_reg++);
> +                               i, pred_width, base_reg++);
>          info->num++;
>      }
>      g_string_append_printf(s,
>                             "<reg name=\"ffr\" bitsize=\"%d\""
>                             " regnum=\"%d\" group=\"vector\""
>                             " type=\"svep\"/>",
> -                           cpu->sve_max_vq * 16, base_reg++);
> +                           pred_width, base_reg++);
>  
>      /* Define the vector length pseudo-register. */
>      g_string_append_printf(s,

Reviewed-by: Fabiano Rosas <farosas@suse.de>