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[RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from STE
From: |
Mostafa Saleh |
Subject: |
[RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from STE |
Date: |
Sun, 5 Feb 2023 09:44:06 +0000 |
According to SMMUv3 user manual "5.2 Stream Table Entry": All fields
with an S2 prefix (with the exception of S2VMID) are IGNORED when
stage-2 bypasses translation (Config[1] == 0).
Which means that VMID can be used(for TLB tagging) even if stage-2 is
bypassed, so we parse it unconditionally when S2P exists. Otherwise
it is set to -1.(only S1P)
Advertise 16-bit VMID is supported.
Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
hw/arm/smmuv3.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 769c735697..35a0149bbf 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -260,6 +260,7 @@ static void smmuv3_init_regs(SMMUv3State *s)
s->idr[0] = FIELD_DP32(s->idr[0], IDR0, TTF, 2); /* AArch64 PTW only */
s->idr[0] = FIELD_DP32(s->idr[0], IDR0, COHACC, 1); /* IO coherent */
s->idr[0] = FIELD_DP32(s->idr[0], IDR0, ASID16, 1); /* 16-bit ASID */
+ s->idr[0] = FIELD_DP32(s->idr[0], IDR0, VMID16, 1); /* 16-bit VMID */
s->idr[0] = FIELD_DP32(s->idr[0], IDR0, TTENDIAN, 2); /* little endian */
s->idr[0] = FIELD_DP32(s->idr[0], IDR0, STALL_MODEL, 1); /* No stall */
/* terminated transaction will always be aborted/error returned */
@@ -388,6 +389,14 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
return 0;
}
+ if (STAGE2_SUPPORTED(s->features)) {
+ /* VMID is considered even if s2 is disabled. */
+ cfg->s2cfg.vmid = STE_S2VMID(ste);
+ } else {
+ /* Default to -1 */
+ cfg->s2cfg.vmid = -1;
+ }
+
if (STAGE2_SUPPORTED(s->features) && STE_CFG_S2_ENABLED(config)) {
cfg->stage = 2;
--
2.39.1.519.gcb327c4b5f-goog
[RFC PATCH 14/16] hw/arm/smmuv3: Add stage-2 support in iova notifier, Mostafa Saleh, 2023/02/05
[RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from STE,
Mostafa Saleh <=
[RFC PATCH 12/16] hw/arm/smmuv3: Add VMID to tlb tagging, Mostafa Saleh, 2023/02/05
[RFC PATCH 15/16] hw/arm/smmuv3: Add fault configuration for stage-2, Mostafa Saleh, 2023/02/05
[RFC PATCH 16/16] hw/arm/smmuv3: Enable stage-2 support, Mostafa Saleh, 2023/02/05