Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi]

qemu-devel

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi]

From:	Richard Henderson
Subject:	Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support
Date:	Thu, 2 Feb 2023 07:35:45 -1000
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2

On 2/2/23 04:30, Philipp Tomsich wrote:

On the second pass over these patches, here's how we can use gvec
support for both vror and vrol:

/* Synthesize a rotate-right from a negate(shift-amount) + rotate-left */
static void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs,
                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz)
{
     TCGv_i32 tmp = tcg_temp_new_i32();
     tcg_gen_neg_i32(tmp, shift);
     tcg_gen_gvec_rotls(vece, dofs, aofs, tmp, oprsz, maxsz);


We can add rotls generically.
I hadn't done this so far because there were no users.


r~

[Prev in Thread]

Current Thread

[Next in Thread]

[PATCH 15/39] target/riscv: Add vaesdf.vs decoding, translation and execution support, (continued)
- [PATCH 15/39] target/riscv: Add vaesdf.vs decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 25/39] target/riscv: Add vsha2ms.vv decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 23/39] target/riscv: expose zvkns cpu property, Lawrence Hunter, 2023/02/02
- [PATCH 04/39] target/riscv: Add vclmulh.vv decoding, translation and execution support, Lawrence Hunter, 2023/02/02
  - Re: [PATCH 04/39] target/riscv: Add vclmulh.vv decoding, translation and execution support, Philipp Tomsich, 2023/02/02
  - Re: [PATCH 04/39] target/riscv: Add vclmulh.vv decoding, translation and execution support, Richard Henderson, 2023/02/02
- [PATCH 11/39] target/riscv: add zvkns cpu property, Lawrence Hunter, 2023/02/02
- [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Lawrence Hunter, 2023/02/02
  - Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Philipp Tomsich, 2023/02/02
    - Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Philipp Tomsich, 2023/02/02
    - Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Richard Henderson <=
    - Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Philipp Tomsich, 2023/02/02
    - Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Richard Henderson, 2023/02/02
- [PATCH 28/39] target/riscv: add zvksh cpu property, Lawrence Hunter, 2023/02/02
- [PATCH 21/39] target/riscv: Add vaeskf1.vi decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 26/39] target/riscv: Add vsha2c[hl].vv decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 29/39] target/riscv: Add vsm3me.vv decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 33/39] target/riscv: Add vghmac.vv decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 16/39] target/riscv: Add vaesdm.vv decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 22/39] target/riscv: Add vaeskf2.vi decoding, translation and execution support, Lawrence Hunter, 2023/02/02
- [PATCH 20/39] target/riscv: Add vaesem.vs decoding, translation and execution support, Lawrence Hunter, 2023/02/02

Prev by Date: Re: [PATCH v10 0/3] hw/riscv: handle kernel_entry high bits with 32bit CPUs
Next by Date: Re: [PATCH v4 0/5] Series of fixes for PL011 char device
Previous by thread: Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support
Next by thread: Re: [PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support
Index(es):
- Date
- Thread