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[PATCH v2 10/10] tests/tcg/tricore: Add LD.BU tests
From: |
Bastian Koppelmann |
Subject: |
[PATCH v2 10/10] tests/tcg/tricore: Add LD.BU tests |
Date: |
Thu, 2 Feb 2023 13:04:32 +0100 |
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
tests/tcg/tricore/Makefile.softmmu-target | 1 +
tests/tcg/tricore/macros.h | 23 +++++++++++++++++++++++
tests/tcg/tricore/test_ld_bu.S | 15 +++++++++++++++
3 files changed, 39 insertions(+)
create mode 100644 tests/tcg/tricore/test_ld_bu.S
diff --git a/tests/tcg/tricore/Makefile.softmmu-target
b/tests/tcg/tricore/Makefile.softmmu-target
index e83cc4b7cd..b6c19dbecd 100644
--- a/tests/tcg/tricore/Makefile.softmmu-target
+++ b/tests/tcg/tricore/Makefile.softmmu-target
@@ -13,6 +13,7 @@ TESTS += test_fmul.tst
TESTS += test_ftoi.tst
TESTS += test_imask.tst
TESTS += test_insert.tst
+TESTS += test_ld_bu.tst
TESTS += test_madd.tst
TESTS += test_msub.tst
TESTS += test_muls.tst
diff --git a/tests/tcg/tricore/macros.h b/tests/tcg/tricore/macros.h
index 06bdbf83cb..109ef62a4d 100644
--- a/tests/tcg/tricore/macros.h
+++ b/tests/tcg/tricore/macros.h
@@ -4,6 +4,10 @@
movh DREG_TEMP_LI, up:val; \
or reg, reg, DREG_TEMP_LI; \
+#define LIA(reg, val) \
+ LI(DREG_TEMP, val) \
+ mov.a reg, DREG_TEMP;
+
/* Address definitions */
#define TESTDEV_ADDR 0xf0000000
/* Register definitions */
@@ -18,6 +22,10 @@
#define DREG_TEST_NUM %d14
#define DREG_CORRECT_RESULT %d15
+#define AREG_ADDR %a0
+#define AREG_CORRECT_RESULT %a3
+#define MEM_BASE_ADDR 0xd0000000
+
#define DREG_DEV_ADDR %a15
#define EREG_RS1 %e6
@@ -60,11 +68,24 @@ test_ ## num:
\
mov DREG_TEST_NUM, num; \
jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
+#define TEST_LD(insn, num, result, addr_result, ld_pattern) \
+test_ ## num: \
+ LIA(AREG_ADDR, test_data) \
+ insn DREG_CALC_RESULT, ld_pattern; \
+ LI(DREG_CORRECT_RESULT, result) \
+ mov DREG_TEST_NUM, num; \
+ jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail; \
+ mov.d DREG_CALC_RESULT, AREG_ADDR; \
+ LI(DREG_CORRECT_RESULT, addr_result) \
+ jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
+
/* Actual test case type
* e.g inst %dX, %dY -> TEST_D_D
* inst %dX, %dY, %dZ -> TEST_D_DD
* inst %eX, %dY, %dZ -> TEST_E_DD
*/
+
+
#define TEST_D_D(insn, num, result, rs1) \
TEST_CASE(num, DREG_CALC_RESULT, result, \
LI(DREG_RS1, rs1); \
@@ -143,6 +164,8 @@ test_ ## num:
\
insn EREG_CALC_RESULT, imm1, DREG_RS1, imm2); \
)
+
+
/* Pass/Fail handling part */
#define TEST_PASSFAIL \
j pass; \
diff --git a/tests/tcg/tricore/test_ld_bu.S b/tests/tcg/tricore/test_ld_bu.S
new file mode 100644
index 0000000000..ff9dac128b
--- /dev/null
+++ b/tests/tcg/tricore/test_ld_bu.S
@@ -0,0 +1,15 @@
+#include "macros.h"
+.data
+test_data:
+ .word 0xaffedead
+ .word 0x001122ff
+.text
+.global _start
+_start:
+# expect. addr reg val after load
+# insn num expect. load value | pattern for loading
+# | | | | |
+ TEST_LD(ld.bu, 1, 0xff, MEM_BASE_ADDR + 4, [+AREG_ADDR]4) # pre_inc
+ TEST_LD(ld.bu, 2, 0xad, MEM_BASE_ADDR + 4, [AREG_ADDR+]4) # post_inc
+
+ TEST_PASSFAIL
--
2.39.1
- [PATCH v2 08/10] tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR tests, (continued)
- [PATCH v2 08/10] tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR tests, Bastian Koppelmann, 2023/02/02
- [PATCH v2 09/10] target/tricore: Fix OPC2_32_BO_LD_BU_PREINC, Bastian Koppelmann, 2023/02/02
- [PATCH v2 02/10] tests/tcg/tricore: Add test for OPC2_32_RCRW_IMASK, Bastian Koppelmann, 2023/02/02
- [PATCH v2 06/10] tests/tcg/tricore: Add tests for RRPW_DEXTR, Bastian Koppelmann, 2023/02/02
- [PATCH v2 05/10] target/tricore: Fix RRPW_DEXTR, Bastian Koppelmann, 2023/02/02
- [PATCH v2 03/10] target/tricore: Fix OPC2_32_RCRW_INSERT translation, Bastian Koppelmann, 2023/02/02
- [PATCH v2 01/10] target/tricore: Fix OPC2_32_RCRW_IMASK translation, Bastian Koppelmann, 2023/02/02
- [PATCH v2 07/10] target/tricore: Fix OPC2_32_RRRR_DEXTR, Bastian Koppelmann, 2023/02/02
- [PATCH v2 04/10] tests/tcg/tricore: Add test for OPC2_32_RCRW_INSERT, Bastian Koppelmann, 2023/02/02
- [PATCH v2 10/10] tests/tcg/tricore: Add LD.BU tests,
Bastian Koppelmann <=