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[PATCH 13/18] hw/i386/pc: Support smp.clusters for x86 PC machine
From: |
Zhao Liu |
Subject: |
[PATCH 13/18] hw/i386/pc: Support smp.clusters for x86 PC machine |
Date: |
Thu, 2 Feb 2023 17:49:24 +0800 |
From: Zhuocheng Ding <zhuocheng.ding@intel.com>
As module-level topology support is added to X86CPU, now we can enable
the support for the cluster parameter on PC machines. With this support,
we can define a 5-level x86 CPU topology with "-smp":
-smp cpus=*,maxcpus=*,sockets=*,dies=*,clusters=*,cores=*,threads=*.
Additionally, add the 5-level topology example in description of "-smp".
Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
hw/i386/pc.c | 1 +
qemu-options.hx | 10 +++++-----
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 6e592bd969aa..c329df56ebd2 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1929,6 +1929,7 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
mc->nvdimm_supported = true;
mc->smp_props.dies_supported = true;
+ mc->smp_props.clusters_supported = true;
mc->default_ram_id = "pc.ram";
object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
diff --git a/qemu-options.hx b/qemu-options.hx
index d59d19704bc5..3700e1aa97ea 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -312,14 +312,14 @@ SRST
-smp 8,sockets=2,cores=2,threads=2,maxcpus=8
The following sub-option defines a CPU topology hierarchy (2 sockets
- totally on the machine, 2 dies per socket, 2 cores per die, 2 threads
- per core) for PC machines which support sockets/dies/cores/threads.
- Some members of the option can be omitted but their values will be
- automatically computed:
+ totally on the machine, 2 dies per socket, 2 clusters per die, 2 cores per
+ cluster, 2 threads per core) for PC machines which support sockets/dies
+ /clusters/cores/threads. Some members of the option can be omitted but
+ their values will be automatically computed:
::
- -smp 16,sockets=2,dies=2,cores=2,threads=2,maxcpus=16
+ -smp 32,sockets=2,dies=2,clusters=2,cores=2,threads=2,maxcpus=32
The following sub-option defines a CPU topology hierarchy (2 sockets
totally on the machine, 2 clusters per socket, 2 cores per cluster,
--
2.34.1
- [PATCH 02/18] tests: Rename test-x86-cpuid.c to test-x86-apicid.c, (continued)
- [PATCH 02/18] tests: Rename test-x86-cpuid.c to test-x86-apicid.c, Zhao Liu, 2023/02/02
- [PATCH 04/18] i386/cpu: Fix number of addressable IDs in CPUID.04H, Zhao Liu, 2023/02/02
- [PATCH 05/18] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid(), Zhao Liu, 2023/02/02
- [PATCH 06/18] i386: Introduce module-level cpu topology to CPUX86State, Zhao Liu, 2023/02/02
- [PATCH 07/18] i386: Support modules_per_die in X86CPUTopoInfo, Zhao Liu, 2023/02/02
- [PATCH 09/18] i386: Fix comment style in topology.h, Zhao Liu, 2023/02/02
- [PATCH 10/18] i386: Update APIC ID parsing rule to support module level, Zhao Liu, 2023/02/02
- [PATCH 08/18] i386: Support module_id in X86CPUTopoIDs, Zhao Liu, 2023/02/02
- [PATCH 11/18] i386/cpu: Introduce cluster-id to X86CPU, Zhao Liu, 2023/02/02
- [PATCH 12/18] tests: Add test case of APIC ID for module level parsing, Zhao Liu, 2023/02/02
- [PATCH 13/18] hw/i386/pc: Support smp.clusters for x86 PC machine,
Zhao Liu <=
- [PATCH 15/18] i386: Use CPUCacheInfo.share_level to encode CPUID[4].EAX[bits 25:14], Zhao Liu, 2023/02/02
- [PATCH 16/18] i386: Fix NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14], Zhao Liu, 2023/02/02
- [PATCH 14/18] i386: Add cache topology info in CPUCacheInfo, Zhao Liu, 2023/02/02
- [PATCH 17/18] i386: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14], Zhao Liu, 2023/02/02
- [PATCH 18/18] i386: Add new property to control L2 cache topo in CPUID.04H, Zhao Liu, 2023/02/02