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Re: [PATCH for-8.0 07/29] accel/tcg: Honor atomicity of loads
From: |
Peter Maydell |
Subject: |
Re: [PATCH for-8.0 07/29] accel/tcg: Honor atomicity of loads |
Date: |
Tue, 22 Nov 2022 14:35:49 +0000 |
On Fri, 18 Nov 2022 at 09:50, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Create ldst_atomicity.c.inc.
>
> Not required for user-only code loads, because we've ensured that
> the page is read-only before beginning to translate code.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> +/**
> + * required_atomicity:
> + *
> + * Return the lg2 bytes of atomicity required by @memop for @p.
> + * If the operation must be split into two operations to be
> + * examined separately for atomicity, return -lg2.
> + */
> +static int required_atomicity(CPUArchState *env, uintptr_t p, MemOp memop)
> +{
> + int atmax = memop & MO_ATMAX_MASK;
> + int size = memop & MO_SIZE;
> + unsigned tmp;
> +
> + if (atmax == MO_ATMAX_SIZE) {
> + atmax = size;
> + } else {
> + atmax >>= MO_ATMAX_SHIFT;
> + }
> +
> + switch (memop & MO_ATOM_MASK) {
> + case MO_ATOM_IFALIGN:
> + tmp = (1 << atmax) - 1;
> + if (p & tmp) {
> + return MO_8;
> + }
> + break;
> + case MO_ATOM_NONE:
> + return MO_8;
> + case MO_ATOM_SUBALIGN:
> + tmp = p & -p;
> + if (tmp != 0 && tmp < atmax) {
> + atmax = tmp;
> + }
> + break;
> + case MO_ATOM_WITHIN16:
> + tmp = p & 15;
> + if (tmp + (1 << size) <= 16) {
> + atmax = size;
> + } else if (atmax < size && tmp + (1 << atmax) != 16) {
> + /*
> + * Paired load/store, where the pairs aren't aligned.
> + * One of the two must still be handled atomically.
> + */
> + atmax = -atmax;
> + }
> + break;
> + default:
> + g_assert_not_reached();
> + }
> +
> + /*
> + * Here we have the architectural atomicity of the operation.
> + * However, when executing in a serial context, we need no extra
> + * host atomicity in order to avoid racing. This reduction
> + * avoids looping with cpu_loop_exit_atomic.
> + */
> + if (cpu_in_serial_context(env_cpu(env))) {
Is it OK to use cpu_in_serial_context() here ? Even if
there's no other vCPU executing in parallel, there might
be device model code doing a memory write in the iothread,
I think.
> + return MO_8;
> + }
> + return atmax;
> +}
thanks
-- PMM
- [PATCH for-8.0 00/29] tcg: Improve atomicity support, Richard Henderson, 2022/11/18
- [PATCH for-8.0 02/29] include/exec/memop: Add bits describing atomicity, Richard Henderson, 2022/11/18
- [PATCH for-8.0 03/29] accel/tcg: Add cpu_in_serial_context, Richard Henderson, 2022/11/18
- [PATCH for-8.0 04/29] accel/tcg: Introduce tlb_read_idx, Richard Henderson, 2022/11/18
- [PATCH for-8.0 05/29] accel/tcg: Reorg system mode load helpers, Richard Henderson, 2022/11/18
- [PATCH for-8.0 01/29] include/qemu/cpuid: Introduce xgetbv_low, Richard Henderson, 2022/11/18
- [PATCH for-8.0 06/29] accel/tcg: Reorg system mode store helpers, Richard Henderson, 2022/11/18
- [PATCH for-8.0 07/29] accel/tcg: Honor atomicity of loads, Richard Henderson, 2022/11/18
- Re: [PATCH for-8.0 07/29] accel/tcg: Honor atomicity of loads,
Peter Maydell <=
- [PATCH for-8.0 09/29] tcg/tci: Use cpu_{ld,st}_mmu, Richard Henderson, 2022/11/18
- [PATCH for-8.0 08/29] accel/tcg: Honor atomicity of stores, Richard Henderson, 2022/11/18
- [PATCH for-8.0 11/29] accel/tcg: Implement helper_{ld, st}*_mmu for user-only, Richard Henderson, 2022/11/18
- [PATCH for-8.0 10/29] tcg: Unify helper_{be,le}_{ld,st}*, Richard Henderson, 2022/11/18
- [PATCH for-8.0 12/29] tcg: Add 128-bit guest memory primitives, Richard Henderson, 2022/11/18
- [PATCH for-8.0 21/29] tcg/i386: Introduce tcg_out_mov2, Richard Henderson, 2022/11/18