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[PULL 5/5] target/arm: Limit LPA2 effective output address when TCR.DS =
From: |
Peter Maydell |
Subject: |
[PULL 5/5] target/arm: Limit LPA2 effective output address when TCR.DS == 0 |
Date: |
Mon, 21 Nov 2022 13:02:39 +0000 |
From: Ard Biesheuvel <ardb@kernel.org>
With LPA2, the effective output address size is at most 48 bits when
TCR.DS == 0. This case is currently unhandled in the page table walker,
where we happily assume LVA/64k granule when outputsize > 48 and
param.ds == 0, resulting in the wrong conversion to be used from a
page table descriptor to a physical address.
if (outputsize > 48) {
if (param.ds) {
descaddr |= extract64(descriptor, 8, 2) << 50;
} else {
descaddr |= extract64(descriptor, 12, 4) << 48;
}
So cap the outputsize to 48 when TCR.DS is cleared, as per the
architecture.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221116170316.259695-1-ardb@kernel.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/ptw.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 3745ac97234..9a6277d862f 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -1222,6 +1222,14 @@ static bool get_phys_addr_lpae(CPUARMState *env,
S1Translate *ptw,
ps = MIN(ps, param.ps);
assert(ps < ARRAY_SIZE(pamax_map));
outputsize = pamax_map[ps];
+
+ /*
+ * With LPA2, the effective output address (OA) size is at most 48 bits
+ * unless TCR.DS == 1
+ */
+ if (!param.ds && param.gran != Gran64K) {
+ outputsize = MIN(outputsize, 48);
+ }
} else {
param = aa32_va_parameters(env, address, mmu_idx);
level = 1;
--
2.25.1
- [PULL 0/5] target-arm queue, Peter Maydell, 2022/11/21
- [PULL 3/5] hw/intc: add implementation of GICD_IIDR to Arm GIC, Peter Maydell, 2022/11/21
- [PULL 4/5] tests/avocado/boot_linux.py: Bump aarch64 virt test timeout to 720s, Peter Maydell, 2022/11/21
- [PULL 1/5] hw/sd: Fix sun4i allwinner-sdhost for U-Boot, Peter Maydell, 2022/11/21
- [PULL 2/5] hw/intc: clean-up access to GIC multi-byte registers, Peter Maydell, 2022/11/21
- [PULL 5/5] target/arm: Limit LPA2 effective output address when TCR.DS == 0,
Peter Maydell <=
- Re: [PULL 0/5] target-arm queue, Stefan Hajnoczi, 2022/11/21