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[PATCH v5 16/20] include: add MEMTXATTRS_MACHINE helper
From: |
Alex Bennée |
Subject: |
[PATCH v5 16/20] include: add MEMTXATTRS_MACHINE helper |
Date: |
Fri, 11 Nov 2022 18:25:31 +0000 |
We will need this shortly for machine specific transactions for the PC
IOAPIC.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
include/exec/memattrs.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index 8359fc448b..b92f11aaa4 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -104,6 +104,14 @@ typedef struct MemTxAttrs {
{.requester_type = MTRT_PCI, \
.requester_id = pci_requester_id(dev)})
+/*
+ * Helper for setting a machine specific sourced transaction. The
+ * details of how to decode the requester_id are machine specific.
+ */
+#define MEMTXATTRS_MACHINE(id) ((MemTxAttrs) \
+ {.requester_type = MTRT_MACHINE, \
+ .requester_id = id })
+
/* New-style MMIO accessors can indicate that the transaction failed.
* A zero (MEMTX_OK) response means success; anything else is a failure
* of some kind. The memory subsystem will bitwise-OR together results
--
2.34.1
- Re: [PATCH v5 19/20] hw/isa: derive CPUState from MemTxAttrs in apm_ioport_writeb, (continued)
- [PATCH v5 06/20] qtest: make read/write operation appear to be from CPU, Alex Bennée, 2022/11/11
- [PATCH v5 09/20] hw/arm: remove current_cpu hack from pxa2xx access, Alex Bennée, 2022/11/11
- [PATCH v5 10/20] target/microblaze: initialise MemTxAttrs for CPU access, Alex Bennée, 2022/11/11
- [PATCH v5 12/20] target/riscv: initialise MemTxAttrs for CPU access, Alex Bennée, 2022/11/11
- [PATCH v5 16/20] include: add MEMTXATTRS_MACHINE helper,
Alex Bennée <=
- [PATCH v5 11/20] target/sparc: initialise MemTxAttrs for CPU access, Alex Bennée, 2022/11/11
- [PATCH v5 18/20] hw/i386: convert apic access to use MemTxAttrs, Alex Bennée, 2022/11/11
- [PATCH v5 20/20] include/hw: add commentary to current_cpu export, Alex Bennée, 2022/11/11