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[PULL 13/33] target/arm: Advance pc for arch single-step exception
From: |
Peter Maydell |
Subject: |
[PULL 13/33] target/arm: Advance pc for arch single-step exception |
Date: |
Wed, 15 Dec 2021 10:40:29 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
The size of the code covered by a TranslationBlock cannot be 0;
this is checked via assert in tb_gen_code.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-a64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 9c4258ccac2..2986fe13935 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14767,6 +14767,7 @@ static void aarch64_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
assert(s->base.num_insns == 1);
gen_swstep_exception(s, 0, 0);
s->base.is_jmp = DISAS_NORETURN;
+ s->base.pc_next = pc + 4;
return;
}
--
2.25.1
- [PULL 05/33] docs: aspeed: ADC is now modelled, (continued)
- [PULL 05/33] docs: aspeed: ADC is now modelled, Peter Maydell, 2021/12/15
- [PULL 10/33] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn, Peter Maydell, 2021/12/15
- [PULL 12/33] target/arm: Split arm_pre_translate_insn, Peter Maydell, 2021/12/15
- [PULL 14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault, Peter Maydell, 2021/12/15
- [PULL 09/33] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn, Peter Maydell, 2021/12/15
- [PULL 15/33] target/arm: Take an exception if PC is misaligned, Peter Maydell, 2021/12/15
- [PULL 16/33] target/arm: Assert thumb pc is aligned, Peter Maydell, 2021/12/15
- [PULL 17/33] target/arm: Suppress bp for exceptions with more priority, Peter Maydell, 2021/12/15
- [PULL 20/33] include/hw/i386: Don't include qemu-common.h in .h files, Peter Maydell, 2021/12/15
- [PULL 21/33] target/hexagon/cpu.h: don't include qemu-common.h, Peter Maydell, 2021/12/15
- [PULL 13/33] target/arm: Advance pc for arch single-step exception,
Peter Maydell <=
- [PULL 18/33] tests/tcg: Add arm and aarch64 pc alignment tests, Peter Maydell, 2021/12/15
- [PULL 19/33] target/i386: Use assert() to sanity-check b1 in SSE decode, Peter Maydell, 2021/12/15
- [PULL 24/33] target/arm: Correct calculation of tlb range invalidate length, Peter Maydell, 2021/12/15
- [PULL 27/33] hw/arm/virt: Remove device tree restriction for virtio-iommu, Peter Maydell, 2021/12/15
- [PULL 28/33] hw/arm/virt: Reject instantiation of multiple IOMMUs, Peter Maydell, 2021/12/15
- [PULL 08/33] hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selector, Peter Maydell, 2021/12/15
- [PULL 32/33] tests/acpi: add expected blobs for VIOT test on q35 machine, Peter Maydell, 2021/12/15
- [PULL 25/33] hw/net: npcm7xx_emc fix missing queue_flush, Peter Maydell, 2021/12/15
- [PULL 26/33] hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu, Peter Maydell, 2021/12/15
- [PULL 22/33] target/rx/cpu.h: Don't include qemu-common.h, Peter Maydell, 2021/12/15