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Re: [PATCH 20/55] target/arm: Implement MVE VDUP
From: |
Peter Maydell |
Subject: |
Re: [PATCH 20/55] target/arm: Implement MVE VDUP |
Date: |
Wed, 9 Jun 2021 11:06:43 +0100 |
On Wed, 9 Jun 2021 at 00:17, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 6/7/21 9:57 AM, Peter Maydell wrote:
> > +#define DO_VDUP(OP, ESIZE, TYPE, H) \
> > + void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t val) \
> > + { \
> > + TYPE *d = vd; \
> > + uint16_t mask = mve_element_mask(env); \
> > + unsigned e; \
> > + for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \
> > + uint64_t bytemask = mask_to_bytemask##ESIZE(mask); \
> > + d[H(e)] &= ~bytemask; \
> > + d[H(e)] |= (val & bytemask); \
> > + } \
> > + mve_advance_vpt(env); \
> > + }
> > +
> > +DO_VDUP(vdupb, 1, uint8_t, H1)
> > +DO_VDUP(vduph, 2, uint16_t, H2)
> > +DO_VDUP(vdupw, 4, uint32_t, H4)
>
> Hmm. I think the masking should be done at either uint32_t or uint64_t.
> Doing
> it byte-by-byte is wasteful.
Mmm. I think some of this structure is holdover from an initial
misinterpretation
of the spec that all these ops looked at the predicate bit for the LS byte
of the element to see if the entire element was acted upon, in which case
you do need to work element-by-element with the right size. (This is actually
true for some operations, but mostly the predicate bits do bytewise masking
and can give you a partial chunk of a result element, as here.)
-- PMM
- Re: [PATCH 13/55] target/arm: Implement MVE VCLZ, (continued)
[PATCH 12/55] target/arm: Implement widening/narrowing MVE VLDR/VSTR insns, Peter Maydell, 2021/06/07
[PATCH 14/55] target/arm: Implement MVE VCLS, Peter Maydell, 2021/06/07
[PATCH 21/55] target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR, Peter Maydell, 2021/06/07
[PATCH 20/55] target/arm: Implement MVE VDUP, Peter Maydell, 2021/06/07
[PATCH 32/55] target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH, Peter Maydell, 2021/06/07
[PATCH 18/55] target/arm: Implement MVE VABS, Peter Maydell, 2021/06/07
[PATCH 17/55] target/arm: Implement MVE VMVN (register), Peter Maydell, 2021/06/07
[PATCH 22/55] target/arm: Implement MVE VADD, VSUB, VMUL, Peter Maydell, 2021/06/07